-
Notifications
You must be signed in to change notification settings - Fork 752
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[SYCL] Temporarily disable hier_par test #1253
Conversation
The CodeGenSYCL/hier_par.cpp test is exhibiting inconsistent behavior. This patch marks that test as UNSUPPORTED. When hierarchical parallelism is stabilized the test should be re-enabled. Signed-off-by: Andy Kaylor <andrew.kaylor@intel.com>
In #1205 I was trying to fix the test and your PR is disabling it, so looks like merging them doesn't make sense. I want to update #1205 by changing the test to feed IR to LowerWGScope pass and check output IR (it looks like opt tool is available during check-clang). This should solve the problem with non-stable IR coming from frontend. Let me upload this change today so there will be non need to disable this test. P.S. Also I am considering to move this pass to llvm because clang probably is the wrong place for it. |
If #1205 fixes the test then my change can be discarded. I just wanted to avoid the unexpected pass that sometimes happens. |
+1 for running isolated pass instead of clang.
+1. LLVM project is the right place for LLVM passes. Agree with Andy, if #1205 fixes the test, there is not need to disable, but I still see unfixed bugs in the pass, so I'm not sure if the test is going to be fixed by #1205. |
This should absolutely be moved. There shouldn't be any passes in the front end. |
I prepared PR where I moved this pass to llvm project and replaced hier_par test: Closing this PR. |
The CodeGenSYCL/hier_par.cpp test is exhibiting inconsistent behavior.
This patch marks that test as UNSUPPORTED. When hierarchical parallelism
is stabilized the test should be re-enabled.
Signed-off-by: Andy Kaylor andrew.kaylor@intel.com