2019 09 09 meeting notes

Agenda

• Opens
• SYCL development status update
  • Added SYCL compiler build instructions on Windows
  • SYCL runtime is built with Khronos ICD library by default (instead of system OpenCL)
  • Enable typedef-ed kernel names support (https://github.com/intel/llvm/issues/130)
  • Intel FPGA extension to simplify device selection
  • Various USM fixes and improvements
    • Added ordered queue extension support
  • Added "deploy" target to install SYCL toolchain only
  • Added "run on the host" Intel extension. This method allows enqueuing host tasks into SYCL queue.
  • Enabled re-interpretation of 1D sub-buffers
  • No OpenCL API calls in SYCL headers -> no need to link with OpenCL.
• In development features
  • using sycl = cl::sycl; alias to reduce code verbosity
  • Split device code into multiple SPIR-V modules. Current proposal - split per translation unit.
  • Documentation improvements
• LLVM dev round-table topics

Meeting notes

Participants: Alexey Bader(Intel), Mike Kinsner(Intel), Ronan Keryell(Xilinx), Liber Nevin(ANL), Hal Finkel(ANL), Michael Wong(Codeplay)

Opens

No

SYCL development status update

• Added SYCL compiler build instructions on Windows
• SYCL runtime is built with Khronos ICD library by default (instead of system OpenCL)
• Enable typedef-ed kernel names support (https://github.com/intel/llvm/issues/130)
• Intel FPGA extension to simplify device selection
• Various USM fixes and improvements
  • Added ordered queue extension support
• Added "deploy" target to install SYCL toolchain only
• Added "run on the host" Intel extension. This method allows enqueuing host tasks into SYCL queue.
• Enabled re-interpretation of 1D sub-buffers
• No OpenCL API calls in SYCL headers -> no need to link with OpenCL.

In development features

• using sycl = cl::sycl; alias to reduce code verbosity
• Split device code into multiple SPIR-V modules. Current proposal - split per translation unit. https://github.com/intel/llvm/pull/631

Hal Finkel: OpenMP is using similar approach. For implementing target specific features OpenMP declare variant pragma is used. Implementation work is just started now.

Michael Wong: it's too bad they call it 'variant'.

• Documentation improvements

Alexey Bader: I'm working on Clang's command line options for SYCL document. https://github.com/intel/llvm/pull/636

LLVM developer's meeting round-table topics

• SYCL support in the Driver.
• OpenCL Sema
  • Address space handling
    • Ronan will present "address space free" proposal at Khronos F2F.
• SPIR-V support in LLVM
  • +1 from Hal, it would be good to have target to not care about versioning etc.
  • Neil Hickey from ARM is working in this direction
• SYCL runtime
• Testing
  • We customized LIT scripts to enable execution of SYCL runtime tests on CPU, GPU and FPGA. It would be great to review these changes with the community.
  • Hal: Testing of OpenMP offload is not good. We have been having discussions how to improve it in LLVM lab. Main problem there are no accelerators in LLVM lab, but we should have wider variety of HW by LLVM developers Meeting.
  • Enabling on the multiple targets is important.
• Get together with OpenMP development. OpenMP interop.
  • Hal: Each model assumes full control over resources.
  • Hal: We don't have HW in LLVM to test.
  • Ronan: Even on CPU it would be nice. Do you think it would work out-of-the box?
  • Hal: Good question. There should be no problem.
  • Michael Wong: OpenMP implementations do thread pool, which can be controlled.
  • Hal: there are also questions like affinity and binding, etc.
  • Ronan: I less concerned about the runtime, but driver uses different paths for OMP and SYCL.
  • Hal: the host side should work, but parallel regions is different story. We should check that it works.