Set both prime_key_set_0 and prime_key_set_1 when priming key_set

Signed-off-by: Min Xu <min.m.xu@intel.com>
intel · Jun 11, 2024 · 61d39d0 · 61d39d0
1 parent e53fd96
commit 61d39d0
Showing 1 changed file with 24 additions and 0 deletions.
diff --git a/teeio-validator/library/pcie_ide_lib/pcie_ide.c b/teeio-validator/library/pcie_ide_lib/pcie_ide.c
@@ -59,6 +59,15 @@ const char *m_ide_type_name[] = {
   "LinkIDE",
 };
 
+const char *ks_names[] = {
+    "KS0", "KS1"};
+
+const char *direct_names[] = {
+    "RX", "TX"};
+const char *ctrl_reg_names[] = {
+    "tx_ctrl", "rx_ctrl"
+};
+
 PCIE_SEL_IDE_RID_ASSOC_REG_BLOCK m_rid_assoc_reg_block = {
     .rid_assoc1 = {.raw = 0xffff00},
     .rid_assoc2 = {.raw = 0x1}
@@ -943,16 +952,31 @@ void prime_rp_ide_key_set(
     TEEIO_ASSERT(key_set_select < PCIE_IDE_STREAM_KS_NUM);
 
     INTEL_KEYP_STREAM_TXRX_CONTROL stream_txrx_control = {.raw = mmio_read_reg32(ctrl_reg_ptr)};
+    TEEIO_DEBUG((TEEIO_DEBUG_INFO, "Before prime_rp_ide_key_set direction=%s ks=%s: %s=0x%08x\n",
+      direct_names[direction],
+      ks_names[key_set_select],
+      ctrl_reg_names[direction],
+      stream_txrx_control.raw));
+
     if (key_set_select == PCIE_IDE_STREAM_KS0)
     {
         stream_txrx_control.common.prime_key_set_0 = 1;
+        stream_txrx_control.common.prime_key_set_1 = 0;
     }
     else if (key_set_select == PCIE_IDE_STREAM_KS1)
     {
+        stream_txrx_control.common.prime_key_set_0 = 0;
         stream_txrx_control.common.prime_key_set_1 = 1;
     }
     mmio_write_reg32(ctrl_reg_ptr, stream_txrx_control.raw);
 
+    stream_txrx_control.raw = mmio_read_reg32(ctrl_reg_ptr);
+    TEEIO_DEBUG((TEEIO_DEBUG_INFO, "After prime_rp_ide_key_set direction=%s ks=%s: %s=0x%08x\n",
+      direct_names[direction],
+      ks_names[key_set_select],
+      ctrl_reg_names[direction],
+      stream_txrx_control.raw));
+
     // check if ready_key_set_x is 1 after prime
     uint32_t data32 = mmio_read_reg32(status_reg_ptr);
     INTEL_KEYP_STREAM_TXRX_STATUS txrx_status = {.raw = data32};