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Merged master:4a1d230fa6f4 into amd-gfx:0c885f9d960e
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Local branch amd-gfx 0c885f9 Merged master:da886bf471e7 into amd-gfx:d91b2d4303af
Remote branch master 4a1d230 [VE][NFC] Modify function order and simplify comments
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Sw authored and Sw committed Nov 21, 2020
2 parents 0c885f9 + 4a1d230 commit d7e3da1
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Showing 5 changed files with 907 additions and 30 deletions.
50 changes: 25 additions & 25 deletions llvm/lib/Target/VE/VEISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -801,30 +801,6 @@ bool VETargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
return true;
}

bool VETargetLowering::hasAndNot(SDValue Y) const {
EVT VT = Y.getValueType();

// VE doesn't have vector and not instruction.
if (VT.isVector())
return false;

// VE allows different immediate values for X and Y where ~X & Y.
// Only simm7 works for X, and only mimm works for Y on VE. However, this
// function is used to check whether an immediate value is OK for and-not
// instruction as both X and Y. Generating additional instruction to
// retrieve an immediate value is no good since the purpose of this
// function is to convert a series of 3 instructions to another series of
// 3 instructions with better parallelism. Therefore, we return false
// for all immediate values now.
// FIXME: Change hasAndNot function to have two operands to make it work
// correctly with Aurora VE.
if (isa<ConstantSDNode>(Y))
return false;

// It's ok for generic registers.
return true;
}

VETargetLowering::VETargetLowering(const TargetMachine &TM,
const VESubtarget &STI)
: TargetLowering(TM), Subtarget(&STI) {
Expand Down Expand Up @@ -1617,7 +1593,7 @@ SDValue VETargetLowering::PerformDAGCombine(SDNode *N,
}

//===----------------------------------------------------------------------===//
// VE Inline Assembly Support
// VE Inline Assembly Support
//===----------------------------------------------------------------------===//

VETargetLowering::ConstraintType
Expand Down Expand Up @@ -1666,3 +1642,27 @@ unsigned VETargetLowering::getMinimumJumpTableEntries() const {

return TargetLowering::getMinimumJumpTableEntries();
}

bool VETargetLowering::hasAndNot(SDValue Y) const {
EVT VT = Y.getValueType();

// VE doesn't have vector and not instruction.
if (VT.isVector())
return false;

// VE allows different immediate values for X and Y where ~X & Y.
// Only simm7 works for X, and only mimm works for Y on VE. However, this
// function is used to check whether an immediate value is OK for and-not
// instruction as both X and Y. Generating additional instruction to
// retrieve an immediate value is no good since the purpose of this
// function is to convert a series of 3 instructions to another series of
// 3 instructions with better parallelism. Therefore, we return false
// for all immediate values now.
// FIXME: Change hasAndNot function to have two operands to make it work
// correctly with Aurora VE.
if (isa<ConstantSDNode>(Y))
return false;

// It's ok for generic registers.
return true;
}
8 changes: 4 additions & 4 deletions llvm/lib/Target/VE/VESubtarget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ VESubtarget::VESubtarget(const Triple &TT, const std::string &CPU,
InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
FrameLowering(*this) {}

int VESubtarget::getAdjustedFrameSize(int frameSize) const {
uint64_t VESubtarget::getAdjustedFrameSize(uint64_t FrameSize) const {

// VE stack frame:
//
Expand Down Expand Up @@ -93,10 +93,10 @@ int VESubtarget::getAdjustedFrameSize(int frameSize) const {
// 16(fp) | Thread pointer register (%tp=%s14) |
// +----------------------------------------------+

frameSize += 176; // for RSA, RA, and FP
frameSize = alignTo(frameSize, 16); // requires 16 bytes alignment
FrameSize += 176; // For RSA, RA, and FP.
FrameSize = alignTo(FrameSize, 16); // Requires 16 bytes alignment.

return frameSize;
return FrameSize;
}

bool VESubtarget::enableMachineScheduler() const { return true; }
2 changes: 1 addition & 1 deletion llvm/lib/Target/VE/VESubtarget.h
Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ class VESubtarget : public VEGenSubtargetInfo {
/// Given a actual stack size as determined by FrameInfo, this function
/// returns adjusted framesize which includes space for register window
/// spills and arguments.
int getAdjustedFrameSize(int stackSize) const;
uint64_t getAdjustedFrameSize(uint64_t FrameSize) const;

bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
};
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