Merged master:09e34048bf7e into amd-gfx:a19e5acf4bf6

Local branch amd-gfx a19e5ac Merged master:d1ff394ee27e into amd-gfx:d03e22dfa5dc Remote branch master 09e3404 [SelectionDAG] fminnum should be a binary operator
jaebaek · Nov 11, 2020 · e41d79a · e41d79a
2 parents a19e5ac + 09e3404
commit e41d79a
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Showing 39 changed files with 255 additions and 191 deletions.
diff --git a/clang-tools-extra/clangd/test/remote-index/pipeline_helper.py b/clang-tools-extra/clangd/test/remote-index/pipeline_helper.py
@@ -36,6 +36,7 @@ def main():
     s.bind(('localhost', 0))
     server_address = 'localhost:' + str(s.getsockname()[1])
 
+  print('Initializing clangd-index-server...', file=sys.stderr)
   index_server_process = subprocess.Popen([
       'clangd-index-server', '--server-address=' + server_address,
       args.index_file, args.project_root
@@ -53,21 +54,27 @@ def main():
   found_init_message = False
   while index_server_process.poll() is None:
     if b'Server listening' in index_server_process.stderr.readline():
+      print('Server initialization complete.', file=sys.stderr)
       found_init_message = True
       break
 
   if not found_init_message:
+    print('Server initialization failed. Shutting down.', file=sys.stderr)
     sys.exit(1)
 
   in_file = open(args.input_file_name)
 
+  print('Staring clangd...', file=sys.stderr)
   clangd_process = subprocess.Popen([
       'clangd', '--remote-index-address=' + server_address,
       '--project-root=' + args.project_root, '--lit-test', '--sync'
   ],
                                     stdin=in_file)
 
   clangd_process.wait()
+  print(
+      'Clangd executed successfully, shutting down child processes.',
+      file=sys.stderr)
   index_server_process.kill()
 
 

diff --git a/lldb/packages/Python/lldbsuite/test/decorators.py b/lldb/packages/Python/lldbsuite/test/decorators.py
@@ -390,13 +390,6 @@ def should_skip_llgs_tests():
     return skipTestIfFn(should_skip_llgs_tests)(func)
 
 
-def not_remote_testsuite_ready(func):
-    """Decorate the item as a test which is not ready yet for remote testsuite."""
-    def is_remote():
-        return "Not ready for remote testsuite" if lldb.remote_platform else None
-    return skipTestIfFn(is_remote)(func)
-
-
 def expectedFailureOS(
         oslist,
         bugnumber=None,

diff --git a/lldb/test/API/commands/process/launch/TestProcessLaunch.py b/lldb/test/API/commands/process/launch/TestProcessLaunch.py
@@ -28,7 +28,7 @@ def tearDown(self):
         self.runCmd("settings clear auto-confirm")
         TestBase.tearDown(self)
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipIfReproducer
     def test_io(self):
         """Test that process launch I/O redirection flags work properly."""
@@ -82,7 +82,7 @@ def test_io(self):
     # rdar://problem/9056462
     # The process launch flag '-w' for setting the current working directory
     # not working?
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @expectedFailureAll(oslist=["freebsd", "linux"], bugnumber="llvm.org/pr20265")
     @expectedFailureNetBSD
     @skipIfReproducer
@@ -112,7 +112,7 @@ def test_set_working_dir_nonexisting(self):
                 "error:.* No such file or directory: %s" %
                 invalid_dir_path])
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipIfReproducer
     def test_set_working_dir_existing(self):
         """Test that '-w dir' sets the working dir when running the inferior."""

diff --git a/lldb/test/API/functionalities/load_unload/TestLoadUnload.py b/lldb/test/API/functionalities/load_unload/TestLoadUnload.py
@@ -91,7 +91,7 @@ def setSvr4Support(self, enabled):
     # libloadunload_d.so does not appear in the image list because executable
     # dependencies are resolved relative to the debuggers PWD. Bug?
     @expectedFailureAll(oslist=["freebsd", "linux", "netbsd"])
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipIfWindows  # Windows doesn't have dlopen and friends, dynamic libraries work differently
     @skipIfReproducer # VFS is a snapshot.
     def test_modules_search_paths(self):

diff --git a/lldb/test/API/functionalities/load_using_paths/TestLoadUsingPaths.py b/lldb/test/API/functionalities/load_using_paths/TestLoadUsingPaths.py
@@ -36,7 +36,7 @@ def setUp(self):
         self.hidden_dir = os.path.join(self.wd, 'hidden')
         self.hidden_lib = os.path.join(self.hidden_dir, self.lib_name)
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipIfWindows  # Windows doesn't have dlopen and friends, dynamic libraries work differently
     @expectedFlakeyNetBSD
     @expectedFailureAll(oslist=["linux"], archs=['arm'], bugnumber="llvm.org/pr45894")

diff --git a/lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py b/lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py
@@ -14,7 +14,7 @@ class ProcessSaveCoreTestCase(TestBase):
 
     mydir = TestBase.compute_mydir(__file__)
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipUnlessWindows
     def test_cannot_save_core_unless_process_stopped(self):
         """Test that SaveCore fails if the process isn't stopped."""
@@ -28,7 +28,7 @@ def test_cannot_save_core_unless_process_stopped(self):
         error = process.SaveCore(core)
         self.assertTrue(error.Fail())
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @skipUnlessWindows
     def test_save_windows_mini_dump(self):
         """Test that we can save a Windows mini dump."""

diff --git a/lldb/test/API/python_api/target/TestTargetAPI.py b/lldb/test/API/python_api/target/TestTargetAPI.py
@@ -333,7 +333,7 @@ def get_description(self):
         self.expect(desc, exe=False,
                     substrs=['Target', 'Module', 'a.out', 'Breakpoint'])
 
-    @not_remote_testsuite_ready
+    @skipIfRemote
     @add_test_categories(['pyapi'])
     @no_debug_info_test
     @skipIfReproducer # Inferior doesn't run during replay.

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1294,7 +1294,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
 
 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
                                               SDValue &Hi) {
-  ExpandFloatRes_Unary(N, GetFPLibCall(N->getValueType(0),
+  ExpandFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),
                                        RTLIB::FMIN_F32, RTLIB::FMIN_F64,
                                        RTLIB::FMIN_F80, RTLIB::FMIN_F128,
                                        RTLIB::FMIN_PPCF128), Lo, Hi);

diff --git a/llvm/test/CodeGen/PowerPC/fminnum.ll b/llvm/test/CodeGen/PowerPC/fminnum.ll
@@ -51,36 +51,48 @@ define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    stw 0, 4(1)
-; CHECK-NEXT:    stwu 1, -80(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    stwu 1, -112(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
 ; CHECK-NEXT:    .cfi_offset lr, 4
 ; CHECK-NEXT:    stfd 1, 40(1)
 ; CHECK-NEXT:    lwz 3, 44(1)
 ; CHECK-NEXT:    stfd 2, 32(1)
 ; CHECK-NEXT:    stw 3, 60(1)
 ; CHECK-NEXT:    lwz 3, 40(1)
+; CHECK-NEXT:    stfd 3, 72(1)
 ; CHECK-NEXT:    stw 3, 56(1)
 ; CHECK-NEXT:    lwz 3, 36(1)
-; CHECK-NEXT:    lfd 1, 56(1)
+; CHECK-NEXT:    stfd 4, 64(1)
 ; CHECK-NEXT:    stw 3, 52(1)
 ; CHECK-NEXT:    lwz 3, 32(1)
+; CHECK-NEXT:    lfd 1, 56(1)
 ; CHECK-NEXT:    stw 3, 48(1)
+; CHECK-NEXT:    lwz 3, 76(1)
 ; CHECK-NEXT:    lfd 2, 48(1)
+; CHECK-NEXT:    stw 3, 92(1)
+; CHECK-NEXT:    lwz 3, 72(1)
+; CHECK-NEXT:    stw 3, 88(1)
+; CHECK-NEXT:    lwz 3, 68(1)
+; CHECK-NEXT:    lfd 3, 88(1)
+; CHECK-NEXT:    stw 3, 84(1)
+; CHECK-NEXT:    lwz 3, 64(1)
+; CHECK-NEXT:    stw 3, 80(1)
+; CHECK-NEXT:    lfd 4, 80(1)
 ; CHECK-NEXT:    bl fminl
 ; CHECK-NEXT:    stfd 1, 16(1)
 ; CHECK-NEXT:    lwz 3, 20(1)
 ; CHECK-NEXT:    stfd 2, 24(1)
-; CHECK-NEXT:    stw 3, 76(1)
+; CHECK-NEXT:    stw 3, 108(1)
 ; CHECK-NEXT:    lwz 3, 16(1)
-; CHECK-NEXT:    stw 3, 72(1)
+; CHECK-NEXT:    stw 3, 104(1)
 ; CHECK-NEXT:    lwz 3, 28(1)
-; CHECK-NEXT:    lfd 1, 72(1)
-; CHECK-NEXT:    stw 3, 68(1)
+; CHECK-NEXT:    lfd 1, 104(1)
+; CHECK-NEXT:    stw 3, 100(1)
 ; CHECK-NEXT:    lwz 3, 24(1)
-; CHECK-NEXT:    stw 3, 64(1)
-; CHECK-NEXT:    lfd 2, 64(1)
-; CHECK-NEXT:    lwz 0, 84(1)
-; CHECK-NEXT:    addi 1, 1, 80
+; CHECK-NEXT:    stw 3, 96(1)
+; CHECK-NEXT:    lfd 2, 96(1)
+; CHECK-NEXT:    lwz 0, 116(1)
+; CHECK-NEXT:    addi 1, 1, 112
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
   %z = call ppc_fp128 @fminl(ppc_fp128 %x, ppc_fp128 %y) readnone
@@ -126,36 +138,48 @@ define ppc_fp128 @test_intrinsic_fmin_f128(ppc_fp128 %x, ppc_fp128 %y) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    stw 0, 4(1)
-; CHECK-NEXT:    stwu 1, -80(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    stwu 1, -112(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
 ; CHECK-NEXT:    .cfi_offset lr, 4
 ; CHECK-NEXT:    stfd 1, 40(1)
 ; CHECK-NEXT:    lwz 3, 44(1)
 ; CHECK-NEXT:    stfd 2, 32(1)
 ; CHECK-NEXT:    stw 3, 60(1)
 ; CHECK-NEXT:    lwz 3, 40(1)
+; CHECK-NEXT:    stfd 3, 72(1)
 ; CHECK-NEXT:    stw 3, 56(1)
 ; CHECK-NEXT:    lwz 3, 36(1)
-; CHECK-NEXT:    lfd 1, 56(1)
+; CHECK-NEXT:    stfd 4, 64(1)
 ; CHECK-NEXT:    stw 3, 52(1)
 ; CHECK-NEXT:    lwz 3, 32(1)
+; CHECK-NEXT:    lfd 1, 56(1)
 ; CHECK-NEXT:    stw 3, 48(1)
+; CHECK-NEXT:    lwz 3, 76(1)
 ; CHECK-NEXT:    lfd 2, 48(1)
+; CHECK-NEXT:    stw 3, 92(1)
+; CHECK-NEXT:    lwz 3, 72(1)
+; CHECK-NEXT:    stw 3, 88(1)
+; CHECK-NEXT:    lwz 3, 68(1)
+; CHECK-NEXT:    lfd 3, 88(1)
+; CHECK-NEXT:    stw 3, 84(1)
+; CHECK-NEXT:    lwz 3, 64(1)
+; CHECK-NEXT:    stw 3, 80(1)
+; CHECK-NEXT:    lfd 4, 80(1)
 ; CHECK-NEXT:    bl fminl
 ; CHECK-NEXT:    stfd 1, 16(1)
 ; CHECK-NEXT:    lwz 3, 20(1)
 ; CHECK-NEXT:    stfd 2, 24(1)
-; CHECK-NEXT:    stw 3, 76(1)
+; CHECK-NEXT:    stw 3, 108(1)
 ; CHECK-NEXT:    lwz 3, 16(1)
-; CHECK-NEXT:    stw 3, 72(1)
+; CHECK-NEXT:    stw 3, 104(1)
 ; CHECK-NEXT:    lwz 3, 28(1)
-; CHECK-NEXT:    lfd 1, 72(1)
-; CHECK-NEXT:    stw 3, 68(1)
+; CHECK-NEXT:    lfd 1, 104(1)
+; CHECK-NEXT:    stw 3, 100(1)
 ; CHECK-NEXT:    lwz 3, 24(1)
-; CHECK-NEXT:    stw 3, 64(1)
-; CHECK-NEXT:    lfd 2, 64(1)
-; CHECK-NEXT:    lwz 0, 84(1)
-; CHECK-NEXT:    addi 1, 1, 80
+; CHECK-NEXT:    stw 3, 96(1)
+; CHECK-NEXT:    lfd 2, 96(1)
+; CHECK-NEXT:    lwz 0, 116(1)
+; CHECK-NEXT:    addi 1, 1, 112
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
   %z = call ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %x, ppc_fp128 %y) readnone
@@ -376,36 +400,44 @@ define ppc_fp128 @fminnum_const(ppc_fp128 %0) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    stw 0, 4(1)
-; CHECK-NEXT:    stwu 1, -80(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    stwu 1, -96(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 96
 ; CHECK-NEXT:    .cfi_offset lr, 4
 ; CHECK-NEXT:    stfd 1, 40(1)
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    stw 3, 76(1)
+; CHECK-NEXT:    lis 4, 16368
+; CHECK-NEXT:    stw 3, 68(1)
+; CHECK-NEXT:    stw 3, 64(1)
 ; CHECK-NEXT:    lwz 3, 44(1)
 ; CHECK-NEXT:    stfd 2, 32(1)
 ; CHECK-NEXT:    stw 3, 60(1)
 ; CHECK-NEXT:    lwz 3, 40(1)
+; CHECK-NEXT:    stw 4, 72(1)
 ; CHECK-NEXT:    stw 3, 56(1)
 ; CHECK-NEXT:    lwz 3, 36(1)
-; CHECK-NEXT:    lfd 1, 56(1)
+; CHECK-NEXT:    lfd 3, 72(1)
 ; CHECK-NEXT:    stw 3, 52(1)
 ; CHECK-NEXT:    lwz 3, 32(1)
+; CHECK-NEXT:    lfd 4, 64(1)
 ; CHECK-NEXT:    stw 3, 48(1)
+; CHECK-NEXT:    lfd 1, 56(1)
 ; CHECK-NEXT:    lfd 2, 48(1)
 ; CHECK-NEXT:    bl fminl
 ; CHECK-NEXT:    stfd 1, 16(1)
 ; CHECK-NEXT:    lwz 3, 20(1)
 ; CHECK-NEXT:    stfd 2, 24(1)
-; CHECK-NEXT:    stw 3, 76(1)
+; CHECK-NEXT:    stw 3, 92(1)
 ; CHECK-NEXT:    lwz 3, 16(1)
-; CHECK-NEXT:    stw 3, 72(1)
+; CHECK-NEXT:    stw 3, 88(1)
 ; CHECK-NEXT:    lwz 3, 28(1)
-; CHECK-NEXT:    lfd 1, 72(1)
-; CHECK-NEXT:    stw 3, 68(1)
+; CHECK-NEXT:    lfd 1, 88(1)
+; CHECK-NEXT:    stw 3, 84(1)
 ; CHECK-NEXT:    lwz 3, 24(1)
-; CHECK-NEXT:    stw 3, 64(1)
-; CHECK-NEXT:    lfd 2, 64(1)
-; CHECK-NEXT:    lwz 0, 84(1)
-; CHECK-NEXT:    addi 1, 1, 80
+; CHECK-NEXT:    stw 3, 80(1)
+; CHECK-NEXT:    lfd 2, 80(1)
+; CHECK-NEXT:    lwz 0, 100(1)
+; CHECK-NEXT:    addi 1, 1, 96
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
   %2 = tail call fast ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %0, ppc_fp128 0xM3FF00000000000000000000000000000)

diff --git a/llvm/test/CodeGen/X86/vec-copysign-avx512.ll b/llvm/test/CodeGen/X86/vec-copysign-avx512.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VLDQ
+; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s
 
 define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind {
 ; CHECK-LABEL: v4f32:

diff --git a/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll b/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll
@@ -1,13 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
 
 ;
 ; Equal

diff --git a/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll b/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll
@@ -1,13 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
 
 ;
 ; Equal

diff --git a/llvm/test/CodeGen/X86/vec_ext_inreg.ll b/llvm/test/CodeGen/X86/vec_ext_inreg.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx  | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx  | FileCheck %s --check-prefixes=ALL,AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
 
 define <8 x i32> @a(<8 x i32> %a) nounwind {
 ; SSE-LABEL: a:

diff --git a/llvm/test/CodeGen/X86/vec_extract-avx.ll b/llvm/test/CodeGen/X86/vec_extract-avx.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
 
 ; When extracting multiple consecutive elements from a larger
 ; vector into a smaller one, do it efficiently. We should use