Overwritten with: 5ad0302 Revert "AMDGPU: Fix verifier error on spill…

…ing partially defined SGPRs"

Based on upstream llvm : 8119d6c [lldb][NFC] Remove dead code in BreakpointResolverAddress

Local changes since c2ea9a1:
5ad0302 Revert "AMDGPU: Fix verifier error on spilling partially defined SGPRs"

Added AMD modification notices and removed some GPL files.

Change-Id: I89446e47f3c8d96d56e28d5774eaa7a3909f2cd8

llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

@@ -1043,19 +1043,13 @@ bool SIRegisterInfo::spillSGPR(MachineBasicBlock::iterator MI,
 
       // Mark the "old value of vgpr" input undef only if this is the first sgpr
       // spill to this specific vgpr in the first basic block.
-      auto MIB = BuildMI(*MBB, MI, DL,
+      BuildMI(*MBB, MI, DL,
               TII->getMCOpcodeFromPseudo(AMDGPU::V_WRITELANE_B32),
               Spill.VGPR)
         .addReg(SubReg, getKillRegState(IsKill))
         .addImm(Spill.Lane)
         .addReg(Spill.VGPR, VGPRDefined ? 0 : RegState::Undef);
 
-      if (i == 0 && NumSubRegs > 1) {
-        // We may be spilling a super-register which is only partially defined,
-        // and need to ensure later spills think the value is defined.
-        MIB.addReg(SuperReg, RegState::ImplicitDefine);
-      }
-
       // FIXME: Since this spills to another register instead of an actual
       // frame index, we should delete the frame index when all references to
       // it are fixed.