Merged master:31ecef76275 into amd-gfx:d0b408567a7

Local branch amd-gfx d0b4085 Merged master:22d40cc3a72 into amd-gfx:e7412f8ea89
Remote branch master 31ecef7 [SystemZ] Don't create PERMUTE nodes with an undef operand.

clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp

@@ -108,10 +108,10 @@ struct StreamState {
     return StreamState{L, Opened, ES};
   }
   static StreamState getClosed(const FnDescription *L) {
-    return StreamState{L, Closed};
+    return StreamState{L, Closed, {}};
   }
   static StreamState getOpenFailed(const FnDescription *L) {
-    return StreamState{L, OpenFailed};
+    return StreamState{L, OpenFailed, {}};
   }
 
   void Profile(llvm::FoldingSetNodeID &ID) const {

lldb/test/API/functionalities/breakpoint/step_over_breakpoint/TestStepOverBreakpoint.py

@@ -51,6 +51,7 @@ def setUp(self):
         self.thread = lldbutil.get_one_thread_stopped_at_breakpoint(self.process, self.breakpoint1)
         self.assertIsNotNone(self.thread, "Didn't stop at breakpoint 1.")
 
+    @skipIfReproducer
     def test_step_instruction(self):
         # Count instructions between breakpoint_1 and breakpoint_4
         contextList = self.target.FindFunctions('main', lldb.eFunctionNameTypeAuto)

lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py

@@ -20,6 +20,7 @@ class TestDeletedExecutable(TestBase):
         triple=no_match('aarch64-.*-android'))
         # determining the architecture of the process fails
     @expectedFailureNetBSD
+    @skipIfReproducer # File synchronization is not supported during replay.
     def test(self):
         self.build()
         exe = self.getBuildArtifact("a.out")

lldb/test/API/functionalities/load_unload/TestLoadUnload.py

@@ -95,6 +95,7 @@ def setSvr4Support(self, enabled):
     @not_remote_testsuite_ready
     @skipIfWindows  # Windows doesn't have dlopen and friends, dynamic libraries work differently
     @expectedFailureNetBSD
+    @skipIfReproducer # VFS is a snapshot.
     def test_modules_search_paths(self):
         """Test target modules list after loading a different copy of the library libd.dylib, and verifies that it works with 'target modules search-paths add'."""
         if self.platformIsDarwin():

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

@@ -38,57 +38,66 @@ class LinuxCoreTestCase(TestBase):
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("AArch64")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_aarch64(self):
         """Test that lldb can read the process information from an aarch64 linux core file."""
         self.do_test("linux-aarch64", self._aarch64_pid, self._aarch64_regions, "a.out")
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_i386(self):
         """Test that lldb can read the process information from an i386 linux core file."""
         self.do_test("linux-i386", self._i386_pid, self._i386_regions, "a.out")
 
     @skipIfLLVMTargetMissing("Mips")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_mips_o32(self):
         """Test that lldb can read the process information from an MIPS O32 linux core file."""
         self.do_test("linux-mipsel-gnuabio32", self._mips_o32_pid,
                 self._mips_regions, "linux-mipsel-gn")
 
     @skipIfLLVMTargetMissing("Mips")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_mips_n32(self):
         """Test that lldb can read the process information from an MIPS N32 linux core file """
         self.do_test("linux-mips64el-gnuabin32", self._mips64_n32_pid,
                 self._mips_regions, "linux-mips64el-")
 
     @skipIfLLVMTargetMissing("Mips")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_mips_n64(self):
         """Test that lldb can read the process information from an MIPS N64 linux core file """
         self.do_test("linux-mips64el-gnuabi64", self._mips64_n64_pid,
                 self._mips_regions, "linux-mips64el-")
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("PowerPC")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_ppc64le(self):
         """Test that lldb can read the process information from an ppc64le linux core file."""
         self.do_test("linux-ppc64le", self._ppc64le_pid, self._ppc64le_regions,
                 "linux-ppc64le.ou")
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_x86_64(self):
         """Test that lldb can read the process information from an x86_64 linux core file."""
         self.do_test("linux-x86_64", self._x86_64_pid, self._x86_64_regions,
         "a.out")
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("SystemZ")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_s390x(self):
         """Test that lldb can read the process information from an s390x linux core file."""
         self.do_test("linux-s390x", self._s390x_pid, self._s390x_regions,
         "a.out")
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_same_pid_running(self):
         """Test that we read the information from the core correctly even if we have a running
         process with the same PID around"""
@@ -117,6 +126,7 @@ def test_same_pid_running(self):
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_two_cores_same_pid(self):
         """Test that we handle the situation if we have two core files with the same PID
         around"""
@@ -197,6 +207,7 @@ def test_FPR_SSE(self):
 
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_i386_sysroot(self):
         """Test that lldb can find the exe for an i386 linux core file using the sysroot."""
 
@@ -221,6 +232,7 @@ def test_i386_sysroot(self):
     @skipIf(triple='^mips')
     @skipIfLLVMTargetMissing("X86")
     @skipIfWindows
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_x86_64_sysroot(self):
         """Test that sysroot has more priority then local filesystem."""
 

lldb/test/API/functionalities/postmortem/netbsd-core/TestNetBSDCore.py

@@ -159,11 +159,13 @@ def check_stack(self, process, pid, filename):
         self.check_backtrace(thread, filename, backtrace)
 
     @skipIfLLVMTargetMissing("AArch64")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_aarch64(self):
         """Test single-threaded aarch64 core dump."""
         self.do_test("1lwp_SIGSEGV.aarch64", pid=8339, region_count=32)
 
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_amd64(self):
         """Test single-threaded amd64 core dump."""
         self.do_test("1lwp_SIGSEGV.amd64", pid=693, region_count=21)
@@ -189,11 +191,13 @@ def check_stack(self, process, pid, filename):
         self.assertEqual(thread.GetStopReasonDataAtIndex(0), 0)
 
     @skipIfLLVMTargetMissing("AArch64")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_aarch64(self):
         """Test double-threaded aarch64 core dump where thread 2 is signalled."""
         self.do_test("2lwp_t2_SIGSEGV.aarch64", pid=14142, region_count=31)
 
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_amd64(self):
         """Test double-threaded amd64 core dump where thread 2 is signalled."""
         self.do_test("2lwp_t2_SIGSEGV.amd64", pid=622, region_count=24)
@@ -219,11 +223,13 @@ def check_stack(self, process, pid, filename):
         self.assertEqual(thread.GetStopReasonDataAtIndex(0), signal.SIGSEGV)
 
     @skipIfLLVMTargetMissing("AArch64")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_aarch64(self):
         """Test double-threaded aarch64 core dump where process is signalled."""
         self.do_test("2lwp_process_SIGSEGV.aarch64", pid=1403, region_count=30)
 
     @skipIfLLVMTargetMissing("X86")
+    @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented.
     def test_amd64(self):
         """Test double-threaded amd64 core dump where process is signalled."""
         self.do_test("2lwp_process_SIGSEGV.amd64", pid=665, region_count=24)

llvm/include/llvm/Analysis/InlineAdvisor.h

@@ -123,12 +123,12 @@ class InlineAdvisor {
   /// This must be called when the Inliner pass is entered, to allow the
   /// InlineAdvisor update internal state, as result of function passes run
   /// between Inliner pass runs (for the same module).
-  virtual void OnPassEntry() {}
+  virtual void onPassEntry() {}
 
   /// This must be called when the Inliner pass is exited, as function passes
   /// may be run subsequently. This allows an implementation of InlineAdvisor
   /// to prepare for a partial update.
-  virtual void OnPassExit() {}
+  virtual void onPassExit() {}
 
 protected:
   InlineAdvisor() = default;
@@ -163,7 +163,7 @@ class DefaultInlineAdvisor : public InlineAdvisor {
   std::unique_ptr<InlineAdvice>
   getAdvice(CallBase &CB, FunctionAnalysisManager &FAM) override;
 
-  void OnPassExit() override { freeDeletedFunctions(); }
+  void onPassExit() override { freeDeletedFunctions(); }
   InlineParams Params;
 };
 

llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp

@@ -673,9 +673,9 @@ struct VectorInfo {
   ElementInfo *EI;
 
   /// Vector Type
-  VectorType *const VTy;
+  FixedVectorType *const VTy;
 
-  VectorInfo(VectorType *VTy)
+  VectorInfo(FixedVectorType *VTy)
       : BB(nullptr), PV(nullptr), LIs(), Is(), SVI(nullptr), VTy(VTy) {
     EI = new ElementInfo[VTy->getNumElements()];
   }
@@ -735,7 +735,7 @@ struct VectorInfo {
     if (!Op)
       return false;
 
-    VectorType *VTy = dyn_cast<VectorType>(Op->getType());
+    FixedVectorType *VTy = dyn_cast<FixedVectorType>(Op->getType());
     if (!VTy)
       return false;
 
@@ -785,8 +785,8 @@ struct VectorInfo {
   /// \returns false if no sensible information can be gathered.
   static bool computeFromSVI(ShuffleVectorInst *SVI, VectorInfo &Result,
                              const DataLayout &DL) {
-    VectorType *ArgTy = dyn_cast<VectorType>(SVI->getOperand(0)->getType());
-    assert(ArgTy && "ShuffleVector Operand is not a VectorType");
+    FixedVectorType *ArgTy =
+        cast<FixedVectorType>(SVI->getOperand(0)->getType());
 
     // Compute the left hand vector information.
     VectorInfo LHS(ArgTy);
@@ -1201,7 +1201,7 @@ bool InterleavedLoadCombineImpl::combine(std::list<VectorInfo> &InterleavedLoad,
   Type *ETy = InterleavedLoad.front().SVI->getType()->getElementType();
   unsigned ElementsPerSVI =
       InterleavedLoad.front().SVI->getType()->getNumElements();
-  VectorType *ILTy = VectorType::get(ETy, Factor * ElementsPerSVI);
+  FixedVectorType *ILTy = FixedVectorType::get(ETy, Factor * ElementsPerSVI);
 
   SmallVector<unsigned, 4> Indices;
   for (unsigned i = 0; i < Factor; i++)
@@ -1265,8 +1265,11 @@ bool InterleavedLoadCombineImpl::run() {
     for (BasicBlock &BB : F) {
       for (Instruction &I : BB) {
         if (auto SVI = dyn_cast<ShuffleVectorInst>(&I)) {
+          // We don't support scalable vectors in this pass.
+          if (isa<ScalableVectorType>(SVI->getType()))
+            continue;
 
-          Candidates.emplace_back(SVI->getType());
+          Candidates.emplace_back(cast<FixedVectorType>(SVI->getType()));
 
           if (!VectorInfo::computeFromSVI(SVI, Candidates.back(), DL)) {
             Candidates.pop_back();

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

@@ -1135,15 +1135,20 @@ bool AMDGPURegisterBankInfo::applyMappingWideLoad(MachineInstr &MI,
 
   MachineIRBuilder B(MI);
 
-  unsigned SplitElts =
-      MaxNonSmrdLoadSize / LoadTy.getScalarType().getSizeInBits();
-  const LLT LoadSplitTy =  LLT::vector(SplitElts, LoadTy.getScalarType());
+  unsigned NumSplitParts = LoadTy.getSizeInBits() / MaxNonSmrdLoadSize;
+  const LLT LoadSplitTy = LoadTy.divide(NumSplitParts);
   ApplyRegBankMapping O(*this, MRI, &AMDGPU::VGPRRegBank);
   GISelObserverWrapper Observer(&O);
   B.setChangeObserver(Observer);
   LegalizerHelper Helper(B.getMF(), Observer, B);
-  if (Helper.fewerElementsVector(MI, 0, LoadSplitTy) != LegalizerHelper::Legalized)
-    return false;
+
+  if (LoadTy.isVector()) {
+    if (Helper.fewerElementsVector(MI, 0, LoadSplitTy) != LegalizerHelper::Legalized)
+      return false;
+  } else {
+    if (Helper.narrowScalar(MI, 0, LoadSplitTy) != LegalizerHelper::Legalized)
+      return false;
+  }
 
   MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank);
   return true;

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -4712,13 +4712,6 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
     Target = BR->getOperand(1);
   }
 
-  // FIXME: This changes the types of the intrinsics instead of introducing new
-  // nodes with the correct types.
-  // e.g. llvm.amdgcn.loop
-
-  // eg: i1,ch = llvm.amdgcn.loop t0, TargetConstant:i32<6271>, t3
-  // =>     t9: ch = llvm.amdgcn.loop t0, TargetConstant:i32<6271>, t3, BasicBlock:ch<bb1 0x7fee5286d088>
-
   unsigned CFNode = isCFIntrinsic(Intr);
   if (CFNode == 0) {
     // This is a uniform branch so we don't need to legalize.

llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

@@ -4474,7 +4474,8 @@ static SDValue getGeneralPermuteNode(SelectionDAG &DAG, const SDLoc &DL,
     else
       IndexNodes[I] = DAG.getUNDEF(MVT::i32);
   SDValue Op2 = DAG.getBuildVector(MVT::v16i8, DL, IndexNodes);
-  return DAG.getNode(SystemZISD::PERMUTE, DL, MVT::v16i8, Ops[0], Ops[1], Op2);
+  return DAG.getNode(SystemZISD::PERMUTE, DL, MVT::v16i8, Ops[0],
+                     (!Ops[1].isUndef() ? Ops[1] : Ops[0]), Op2);
 }
 
 namespace {

llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp

@@ -86,9 +86,9 @@ bool WebAssemblyDebugFixup::runOnMachineFunction(MachineFunction &MF) {
           // Search for register rather than assume it is on top (which it
           // typically is if it appears right after the def), since
           // DBG_VALUE's may shift under some circumstances.
-          size_t Depth = 0;
-          for (auto &Elem : Stack) {
+          for (auto &Elem : reverse(Stack)) {
             if (MO.getReg() == Elem.Reg) {
+              auto Depth = static_cast<unsigned>(&Elem - &Stack[0]);
               LLVM_DEBUG(dbgs() << "Debug Value VReg " << MO.getReg()
                                 << " -> Stack Relative " << Depth << "\n");
               MO.ChangeToTargetIndex(WebAssembly::TI_OPERAND_STACK, Depth);
@@ -98,7 +98,6 @@ bool WebAssemblyDebugFixup::runOnMachineFunction(MachineFunction &MF) {
               Elem.DebugValue = &MI;
               break;
             }
-            Depth++;
           }
           // If the Reg was not found, we have a DBG_VALUE outside of its
           // def-use range, and we leave it unmodified as reg, which means

llvm/lib/Transforms/IPO/Inliner.cpp

@@ -696,9 +696,9 @@ PreservedAnalyses InlinerPass::run(LazyCallGraph::SCC &InitialC,
   ProfileSummaryInfo *PSI = MAMProxy.getCachedResult<ProfileSummaryAnalysis>(M);
 
   InlineAdvisor &Advisor = getAdvisor(MAMProxy, M);
-  Advisor.OnPassEntry();
+  Advisor.onPassEntry();
 
-  auto AdvisorOnExit = make_scope_exit([&] { Advisor.OnPassExit(); });
+  auto AdvisorOnExit = make_scope_exit([&] { Advisor.onPassExit(); });
 
   if (!ImportedFunctionsStats &&
       InlinerFunctionImportStats != InlinerFunctionImportStatsOpts::No) {
@@ -808,7 +808,7 @@ PreservedAnalyses InlinerPass::run(LazyCallGraph::SCC &InitialC,
       return FAM.getResult<AssumptionAnalysis>(F);
     };
 
-    // Now process as many calls as we have within this caller in the sequnece.
+    // Now process as many calls as we have within this caller in the sequence.
     // We bail out as soon as the caller has to change so we can update the
     // call graph and prepare the context of that new caller.
     bool DidInline = false;

llvm/lib/Transforms/Utils/Local.cpp

@@ -1698,13 +1698,14 @@ DIExpression *llvm::salvageDebugInfoImpl(Instruction &I,
   };
 
   if (auto *CI = dyn_cast<CastInst>(&I)) {
-    // No-op casts and zexts are irrelevant for debug info.
-    if (CI->isNoopCast(DL) || isa<ZExtInst>(&I))
+    // No-op casts are irrelevant for debug info.
+    if (CI->isNoopCast(DL))
       return SrcDIExpr;
 
     Type *Type = CI->getType();
-    // Casts other than Trunc or SExt to scalar types cannot be salvaged.
-    if (Type->isVectorTy() || (!isa<TruncInst>(&I) && !isa<SExtInst>(&I)))
+    // Casts other than Trunc, SExt, or ZExt to scalar types cannot be salvaged.
+    if (Type->isVectorTy() ||
+        !(isa<TruncInst>(&I) || isa<SExtInst>(&I) || isa<ZExtInst>(&I)))
       return nullptr;
 
     Value *FromValue = CI->getOperand(0);