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Release v1.0
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@jakubcabal jakubcabal released this 28 Sep 08:56
· 26 commits to master since this release
v1.0
0e009b8

Release v1.0:

  • added new version of master module with many optimalizations
  • added DIN_LAST input to master module, for signal control CS_N
  • added simulation tcl script for ModelSim
  • updated simulation testbench
  • updated example design
  • optimized and cleaned slave module
Assets 2
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