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UCB-CS61C project3 : RISC-V CPU design

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CS61CPU

This is my solution repository for UCB CS61C project3: design a two-pipelined CPU for RISC-V.

Here is the project link which give you all the guidance and skeleton code.

https://cs61c.org/fa20/projects/proj3/

Enjoy your CPU journey !

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UCB-CS61C project3 : RISC-V CPU design

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  • Python 65.4%
  • Assembly 34.6%