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Releases: jbilander/ReAgnus

Rev. 2E

17 May 13:00
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ReAgnus Rev. 2E

Hardware verified working, firmware yet to be developed.

When ordering from JLCPCB select:

Specify Layer Sequence: Yes

L1(Top layer):    F_Cu.gbr
L2(Inner layer1): GND_Cu.gbr
L3(Inner layer2): VCC_Cu.gbr
L4(Bottom layer): B_Cu.gbr

Remove Order Number: Specify a location

Rev. 2D

16 Apr 00:09
f3e110b
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Rev. 2D Pre-release
Pre-release

Rev. 2D

ReAgnus design using a PLCC-84-plug

Not tested yet!

Rev. 2B

13 Oct 09:00
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Rev. 2B Pre-release
Pre-release

Rev. 2B

ReAgnus design using a PLCC-84-plug, and 0.45/0.2 mm Vias as minimum via size in order to optimize down cost of PCB production.

Not tested yet!

Rev. 2A

30 Jul 18:28
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Rev. 2A Pre-release
Pre-release

Rev. 2A

ReAgnus design using a PLCC-84-plug

Not tested yet!

Rev. 1B

27 Jun 16:19
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Tag for Revision 1B.