How to create BSP LIB APP

FPGA-based embedded system

This process applies to all versions of recon. Platform recon_0 is used as an example

Create BSP

sw/recon_0$ make generate_bsp

This command can be used to create a fresh bsp or reset the current bsp. This command looks for SOPCINFO file (which is the hardware description file) in the corresponding hw/recon_0 directory.

Edit BSP

sw/recon_0$make edit_bsp

You can change default settings of BSP using a GUI provided by Altera. After making change, you can either click generate button on the GUI or run the make update as described below

Update BSP

sw/recon_0$make update_bsp

This command regenerates the BSP files without changing the BSP setting file itself.

Create LIB

sw/recon_0$ make generate_lib

Library are our driver for our custom peripherals

Create APP

sw/recon_0$ make generate_app APP_NAME=my_app

Create example

sw/recon_0$ make generate_example EX_NAME=frequency_counter|adc_read

Compile example

sw/recon_0$ make app APP_NAME=frequency_counter|adc_read

Create Programming file

Different systems may have different flows to generate non-volatile memory programming file.

sw/recon_0$ make pof APP_NAME=my_app BOARD_NAME=bemicro_max10|max1000

.pof or .jic file requires Quartus Programmer Software to process it and program the flash.
.pof file is used for programming MAX10 onchip flash.
.jic file is used for programming serial flash

serial flash can be programmed by nios2-flash-programmer software using .flash file
recon_1 project uses this flow
sw/recon_1$ make program-flash APP_NAME=<my_app>

This will generate .flash file from .elf file and download to the flash right after the fpga image.

For other useful makes, type make help