Realtime video processing with Prewitt and Sobel Filters targeting Zybo-Z7-20 FPGA.
- Introduction
- Features
- Getting Started
- Prerequisites
- Installation
- Usage
- Demonstration
- Contributing
- License
This project implements real-time video processing using Prewitt and Sobel filters on the Zybo-Z7-20 FPGA. It demonstrates edge detection algorithms applied to live video feed, leveraging the FPGA's parallel processing capabilities.
- Real-time video processing
- Edge detection using Prewitt and Sobel filters
- Targeted for Zybo-Z7-20 FPGA
- Efficient utilization of FPGA resources
Follow these instructions to set up and run the project on your Zybo-Z7-20 FPGA board.
- Zybo-Z7-20 FPGA board
- Vivado Design Suite
- Xilinx SDK
- HDMI input source
- Clone the repository:
git clone https://github.com/jideoyelayo1/Zybo-FPGA-Video-Processing.git
- Open the project in Vivado:
- Open Vivado and create a new project.
- Import the provided VHDL and Verilog files.
- Generate the bitstream and export the hardware.
- Open Xilinx SDK and create a new application project.
- Import the exported hardware.
- Copy the provided C files into the SDK project.
- Program the FPGA with the generated bitstream.
- Connect the HDMI input source to the Zybo-Z7-20 board.
- Power on the board and run the application from the SDK.
- The processed video with edge detection will be displayed on the HDMI output.
Watch the demonstration video on YouTube:
Contributions are welcome! Please fork the repository and create a pull request with your changes.
This project is licensed under the Apache-2.0 License. See the LICENSE file for details.