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kinetis_common: Refactor GPIO implementation
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This is a rewrite of the Kinetis GPIO driver which follows the
refactored API in [1]. Pins are specified using the GPIO_PIN(PORT_x, y)
macro, e.g. GPIO_PIN(PORT_E, 25) for the PTE25 pin.

The interrupt pin handling is now implemented as a linked list, this
is more memory efficient, but with a minor variation in interrupt
latency depending on in what order the pins were initialized at
runtime.

Because the linked list entries are taken from a shared pool, there is
also the possibility of running out of available configuration slots,
define the preprocessor macro GPIO_INT_POOL_SIZE in periph_conf.h if
you need more than 16 pins configured for interrupts in the same
application.

[1]: RIOT-OS#3095
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Joakim Nohlgård committed Oct 24, 2015
1 parent f31db04 commit ef63371
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Showing 14 changed files with 452 additions and 2,309 deletions.
24 changes: 12 additions & 12 deletions boards/frdm-k64f/include/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -48,9 +48,9 @@ extern "C"
* @name LED pin definitions
* @{
*/
#define LED_R_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK)) /**< Clock Enable for PORTD*/
#define LED_G_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK)) /**< Clock Enable for PORTD*/
#define LED_B_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK)) /**< Clock Enable for PORTA*/
#define LED_R_PORT_CLKEN() (PORTB_CLOCK_GATE = 1) /**< Clock Enable for PORTD*/
#define LED_G_PORT_CLKEN() (PORTE_CLOCK_GATE = 1) /**< Clock Enable for PORTE*/
#define LED_B_PORT_CLKEN() (PORTB_CLOCK_GATE = 1) /**< Clock Enable for PORTB*/
#define LED_R_PORT PORTB /**< PORT for Red LED*/
#define LED_R_GPIO GPIOB /**< GPIO-Device for Red LED*/
#define LED_G_PORT PORTE /**< PORT for Green LED*/
Expand All @@ -66,15 +66,15 @@ extern "C"
* @name Macros for controlling the on-board LEDs.
* @{
*/
#define LED_B_ON (LED_B_GPIO->PCOR |= (1 << LED_B_PIN))
#define LED_B_OFF (LED_B_GPIO->PSOR |= (1 << LED_B_PIN))
#define LED_B_TOGGLE (LED_B_GPIO->PTOR |= (1 << LED_B_PIN))
#define LED_G_ON (LED_G_GPIO->PCOR |= (1 << LED_G_PIN))
#define LED_G_OFF (LED_G_GPIO->PSOR |= (1 << LED_G_PIN))
#define LED_G_TOGGLE (LED_G_GPIO->PTOR |= (1 << LED_G_PIN))
#define LED_R_ON (LED_R_GPIO->PCOR |= (1 << LED_R_PIN))
#define LED_R_OFF (LED_R_GPIO->PSOR |= (1 << LED_R_PIN))
#define LED_R_TOGGLE (LED_R_GPIO->PTOR |= (1 << LED_R_PIN))
#define LED_B_ON (LED_B_GPIO->PCOR = (1 << LED_B_PIN))
#define LED_B_OFF (LED_B_GPIO->PSOR = (1 << LED_B_PIN))
#define LED_B_TOGGLE (LED_B_GPIO->PTOR = (1 << LED_B_PIN))
#define LED_G_ON (LED_G_GPIO->PCOR = (1 << LED_G_PIN))
#define LED_G_OFF (LED_G_GPIO->PSOR = (1 << LED_G_PIN))
#define LED_G_TOGGLE (LED_G_GPIO->PTOR = (1 << LED_G_PIN))
#define LED_R_ON (LED_R_GPIO->PCOR = (1 << LED_R_PIN))
#define LED_R_OFF (LED_R_GPIO->PSOR = (1 << LED_R_PIN))
#define LED_R_TOGGLE (LED_R_GPIO->PTOR = (1 << LED_R_PIN))

/* for compatability to other boards */
#define LED_GREEN_ON LED_G_ON
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55 changes: 1 addition & 54 deletions boards/frdm-k64f/include/periph_conf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -258,60 +258,7 @@ extern "C"
* @name GPIO configuration
* @{
*/
#define GPIO_0_EN 1
#define GPIO_1_EN 1
#define GPIO_2_EN 1
#define GPIO_3_EN 1
#define GPIO_4_EN 1
#define GPIO_5_EN 1
#define GPIO_IRQ_PRIO 1
#define ISR_PORT_A isr_porta
#define ISR_PORT_B isr_portb
#define ISR_PORT_C isr_portc
#define ISR_PORT_D isr_portd

/* GPIO channel 0 config */
#define GPIO_0_DEV GPIOB /* LED_R */
#define GPIO_0_PORT PORTB
#define GPIO_0_PORT_BASE PORTB_BASE
#define GPIO_0_PIN 22
#define GPIO_0_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define GPIO_0_IRQ PORTB_IRQn
/* GPIO channel 1 config */
#define GPIO_1_DEV GPIOE /* LED_G */
#define GPIO_1_PORT PORTE
#define GPIO_1_PORT_BASE PORTE_BASE
#define GPIO_1_PIN 26
#define GPIO_1_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_1_IRQ PORTE_IRQn
/* GPIO channel 2 config */
#define GPIO_2_DEV GPIOB /* LED_B */
#define GPIO_2_PORT PORTB
#define GPIO_2_PORT_BASE PORTB_BASE
#define GPIO_2_PIN 21
#define GPIO_2_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define GPIO_2_IRQ PORTB_IRQn
/* GPIO channel 3 config */
#define GPIO_3_DEV GPIOC /* SW2 */
#define GPIO_3_PORT PORTC
#define GPIO_3_PORT_BASE PORTC_BASE
#define GPIO_3_PIN 6
#define GPIO_3_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define GPIO_3_IRQ PORTC_IRQn
/* GPIO channel 4 config */
#define GPIO_4_DEV GPIOB /* A0 (Arduino Headers) */
#define GPIO_4_PORT PORTB
#define GPIO_4_PORT_BASE PORTB_BASE
#define GPIO_4_PIN 2
#define GPIO_4_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define GPIO_4_IRQ PORTB_IRQn
/* GPIO channel 5 config */
#define GPIO_5_DEV GPIOB /* A1 (Arduino Headers) */
#define GPIO_5_PORT PORTB
#define GPIO_5_PORT_BASE PORTB_BASE
#define GPIO_5_PIN 3
#define GPIO_5_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define GPIO_5_IRQ PORTB_IRQn
#define GPIO_IRQ_PRIO CPU_DEFAULT_IRQ_PRIO
/** @} */

/**
Expand Down
40 changes: 20 additions & 20 deletions boards/mulle/include/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -47,15 +47,15 @@
* @{
*/

#define LED_RED_GPIO GPIO_0
#define LED_RED_PORT GPIO_0_DEV
#define LED_RED_PIN GPIO_0_PIN
#define LED_YELLOW_GPIO GPIO_1
#define LED_YELLOW_PORT GPIO_1_DEV
#define LED_YELLOW_PIN GPIO_1_PIN
#define LED_GREEN_GPIO GPIO_2
#define LED_GREEN_PORT GPIO_2_DEV
#define LED_GREEN_PIN GPIO_2_PIN
#define LED_RED_PORT PTC
#define LED_RED_PIN 15
#define LED_RED_GPIO GPIO_PIN(PORT_C, LED_RED_PIN)
#define LED_YELLOW_PORT PTC
#define LED_YELLOW_PIN 14
#define LED_YELLOW_GPIO GPIO_PIN(PORT_C, LED_YELLOW_PIN)
#define LED_GREEN_PORT PTC
#define LED_GREEN_PIN 13
#define LED_GREEN_GPIO GPIO_PIN(PORT_C, LED_GREEN_PIN)

/** @} */

Expand Down Expand Up @@ -92,11 +92,11 @@ void board_init(void);
* @{
*/
#define AT86RF231_SPI SPI_0
#define AT86RF231_CS GPIO_14
#define AT86RF231_INT GPIO_12
#define AT86RF231_CS GPIO_PIN(PORT_D, 4)
#define AT86RF231_INT GPIO_PIN(PORT_B, 9)
/** @todo work around missing RESET pin on Mulle v0.6x */
#define AT86RF231_RESET GPIO_5
#define AT86RF231_SLEEP GPIO_13
#define AT86RF231_RESET GPIO_PIN(PORT_C, 12)
#define AT86RF231_SLEEP GPIO_PIN(PORT_E, 6)
#define AT86RF231_SPI_CLK SPI_SPEED_5MHZ
/** @} */

Expand All @@ -105,9 +105,9 @@ void board_init(void);
* @{
*/

#define LIS3DH_INT1 GPIO_3
#define LIS3DH_INT2 GPIO_4
#define LIS3DH_CS GPIO_15
#define LIS3DH_INT1 GPIO_PIN(PORT_C, 18)
#define LIS3DH_INT2 GPIO_PIN(PORT_C, 17)
#define LIS3DH_CS GPIO_PIN(PORT_D, 0)
#define LIS3DH_SPI SPI_2

/** @} */
Expand All @@ -116,9 +116,9 @@ void board_init(void);
* @name Mulle power control configuration
*/
/** @{ */
#define MULLE_POWER_AVDD GPIO_6 /**< AVDD enable pin */
#define MULLE_POWER_VPERIPH GPIO_7 /**< VPERIPH enable pin */
#define MULLE_POWER_VSEC GPIO_5 /**< VSEC enable pin */
#define MULLE_POWER_AVDD GPIO_PIN(PORT_B, 17) /**< AVDD enable pin */
#define MULLE_POWER_VPERIPH GPIO_PIN(PORT_D, 7) /**< VPERIPH enable pin */
#define MULLE_POWER_VSEC GPIO_PIN(PORT_B, 16) /**< VSEC enable pin */
/** @} */

/**
Expand All @@ -127,7 +127,7 @@ void board_init(void);
/** @{ */
/** FRAM SPI bus, SPI_2 in RIOT is mapped to hardware bus SPI0, see periph_conf.h */
#define MULLE_NVRAM_SPI_DEV SPI_2
#define MULLE_NVRAM_SPI_CS GPIO_16 /**< FRAM CS pin */
#define MULLE_NVRAM_SPI_CS GPIO_PIN(PORT_D, 6) /**< FRAM CS pin */
#define MULLE_NVRAM_CAPACITY 512 /**< FRAM size, in bytes */
#define MULLE_NVRAM_SPI_ADDRESS_COUNT 1 /**< FRAM addressing size, in bytes */
/** @} */
Expand Down
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