Fix IrService bug

john0312 · Jul 13, 2024 · d5934e8 · d5934e8
1 parent e02db2b
commit d5934e8
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Showing 7 changed files with 22 additions and 12 deletions.
diff --git a/fw/Core/Hitcon/Hitcon.cpp b/fw/Core/Hitcon/Hitcon.cpp
@@ -13,15 +13,18 @@
 using namespace hitcon;
 using namespace hitcon::service::sched;
 
-void cb(void *unused1, void *unused2) {
-  uint8_t data[]{0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
+uint8_t hidata[]{0xAA, 0xb, 0xc, 0xd, 0xe, 0xf};
+void cb(void* unused1, void* unused2) {
   size_t len = 6;
-  hitcon::ir::irService.SendBuffer(data, len, true);
+  hitcon::ir::irService.SendBuffer(hidata, len, true);
 }
 
 Task InitTask(1, (task_callback_t)&cb, nullptr);
 
+void test(void* unused1, void* unused2) {}
+
 void hitcon_run() {
+  hitcon::ir::irService.SetOnBufferReceived(test, nullptr);
   hitcon::ir::irService.Init();
   scheduler.Queue(&InitTask, nullptr);
   scheduler.Run();

diff --git a/fw/Core/Hitcon/Service/DisplayInfo.h b/fw/Core/Hitcon/Service/DisplayInfo.h
@@ -6,7 +6,7 @@ namespace hitcon {
 namespace {
 
 constexpr size_t DISPLAY_FRAME_SIZE = 16; // 8 bit/row x 16 row = 16 bytes
-constexpr size_t DISPLAY_FRAME_BATCH = 4;
+constexpr size_t DISPLAY_FRAME_BATCH = 2;
 
 }  // namespace
 

diff --git a/fw/Core/Hitcon/Service/IrParam.h b/fw/Core/Hitcon/Service/IrParam.h
@@ -31,14 +31,15 @@ constexpr size_t DECODE_SAMPLE_RATIO_THRESHOLD = 3;
 constexpr size_t QUEUE_MAX_SIZE = ((PACKET_MAX_LEN + 10) * DECODE_SAMPLE_RATIO);
 
 // Half circular size of the tx dma buffer, this is the number of uint16_t per interrupt (half/full).
-constexpr size_t IR_SERVICE_TX_SIZE = 32;
+constexpr size_t IR_SERVICE_TX_SIZE = 128;
 // Half circular size of the rx dma buffer, this is the number of uint16_t per interrupt (half/full).
 constexpr size_t IR_SERVICE_RX_SIZE = 32;
 constexpr size_t IR_SERVICE_BUFFER_SIZE = PACKET_MAX_LEN;
 constexpr int16_t IR_PWM_TIM_CCR = 16;
 
 // Two elements represents a data bit, see PULSE_PER_HEADER_BIT.
 constexpr uint8_t IR_PACKET_HEADER[] = {
+   0, 0, 0, 0,
    0, // Pad to boundary.
    1, 1, 1, // 1.5x bit time of 1.
    0, 0, 0, 0, 0, // 2.5x bit time of 0.

diff --git a/fw/Core/Hitcon/Service/IrService.cc b/fw/Core/Hitcon/Service/IrService.cc
@@ -41,10 +41,12 @@ void ReceiveDmaCplt(DMA_HandleTypeDef *hdma) {
 
 void TransmitDmaHalfCplt(DMA_HandleTypeDef *hdma) {
   scheduler.Queue(&irService.dma_tx_populate_task, reinterpret_cast<void *>(0));
+  //  irService.PopulateTxDmaBuffer(reinterpret_cast<void *>(1));
 }
 
 void TransmitDmaCplt(DMA_HandleTypeDef *hdma) {
   scheduler.Queue(&irService.dma_tx_populate_task, reinterpret_cast<void *>(1));
+  //  irService.PopulateTxDmaBuffer(reinterpret_cast<void *>(1));
 }
 
 void IrService::OnBufferRecvWrapper(void *arg2) {
@@ -56,6 +58,8 @@ void IrService::Init() {
   HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
   hdma_tim2_ch3.XferHalfCpltCallback = &ReceiveDmaHalfCplt;
   hdma_tim2_ch3.XferCpltCallback = &ReceiveDmaCplt;
+  __HAL_TIM_ENABLE_DMA(&htim3, TIM_DMA_CC3);
+  HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3);
   hdma_tim3_ch3.XferCpltCallback = &TransmitDmaCplt;
   hdma_tim3_ch3.XferHalfCpltCallback = &TransmitDmaHalfCplt;
   HAL_DMA_Start_IT(&hdma_tim2_ch3, reinterpret_cast<uint32_t>(&GPIOA->IDR),
@@ -64,6 +68,8 @@ void IrService::Init() {
   HAL_DMA_Start_IT(&hdma_tim3_ch3, reinterpret_cast<uint32_t>(tx_dma_buffer),
                    reinterpret_cast<uint32_t>(&(htim3.Instance->CCR3)),
                    IR_SERVICE_TX_SIZE * 2);
+  scheduler.Queue(&routine_task, nullptr);
+  scheduler.EnablePeriodic(&routine_task);
 }
 
 bool IrService::CanSendBufferNow() { return tx_state == 0x00000000; }
@@ -117,11 +123,11 @@ void IrService::PopulateTxDmaBuffer(void *ptr_side) {
     size_t ctr = tx_state & 0x00FFFFFF;
     size_t base_bit = ctr * IR_BITS_PER_TX_RUN;
     int i = 0;
-    for (int j = 0; j < IR_BITS_PER_TX_RUN; j++) {
+    for (int j = 0; j < IR_BITS_PER_TX_RUN; j++, base_bit++) {
       int cbit = (tx_pending_buffer[base_bit / 8] >> (base_bit % 8)) & 0x01;
       int16_t ccr_val = (-static_cast<int16_t>(cbit)) & IR_PWM_TIM_CCR;
       for (int k = 0; k < PULSE_PER_DATA_BIT; k++, i++) {
-        tx_dma_buffer[i] = ccr_val;
+        tx_dma_buffer[dma_base + i] = ccr_val;
       }
     }
     tx_state++;
@@ -139,7 +145,7 @@ void IrService::Routine(void *arg1) {
   if (tx_cstate == 0x01) {
     tx_state++;
     size_t ctr = tx_state & 0x00FFFFFF;
-    if (ctr == 64) {
+    if (ctr == 1) {
       tx_state = 0x03000000;
     }
   }

diff --git a/fw/Core/Src/main.cc b/fw/Core/Src/main.cc
@@ -126,8 +126,8 @@ int main(void) {
     hardware_test_app.Init();
     badge_controller.change_app(&hardware_test_app);
   }
-  scheduler.Run();
-  //  hitcon_run();
+//  scheduler.Run();
+    hitcon_run();
 
   /* USER CODE END 2 */
 

diff --git a/fw/Core/Src/tim.c b/fw/Core/Src/tim.c
@@ -50,7 +50,7 @@ void MX_TIM1_Init(void)
   htim1.Instance = TIM1;
   htim1.Init.Prescaler = 5-1;
   htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
-  htim1.Init.Period = 750-1;
+  htim1.Init.Period = 1500-1;
   htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
   htim1.Init.RepetitionCounter = 0;
   htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;

diff --git a/fw/fw.ioc b/fw/fw.ioc
@@ -318,7 +318,7 @@ SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
 SH.S_TIM3_CH3.ConfNb=1
 TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
 TIM1.IPParameters=AutoReloadPreload,Prescaler,Period,TIM_MasterOutputTrigger
-TIM1.Period=750-1
+TIM1.Period=1500-1
 TIM1.Prescaler=5-1
 TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
 TIM2.Channel-PWM\ Generation3\ No\ Output=TIM_CHANNEL_3