GitHub - josefigarola/Gumnut: Gumnut microprocessor in Verilog

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Name		Name	Last commit message	Last commit date
Latest commit History 9 Commits
ADDER.sv		ADDER.sv
ALU.sv		ALU.sv
ALUA.sv		ALUA.sv
ALUEXT.sv		ALUEXT.sv
ALUL.sv		ALUL.sv
ALUS.sv		ALUS.sv
Control_Unit.sv		Control_Unit.sv
Core.sv		Core.sv
Diagrama_Gumnut.jpeg		Diagrama_Gumnut.jpeg
FSM_UC.jpeg		FSM_UC.jpeg
GumnutCore.sv		GumnutCore.sv
IR.sv		IR.sv
IntReg.sv		IntReg.sv
NewPC.sv		NewPC.sv
PCUnit.sv		PCUnit.sv
Procesing_Unit.sv		Procesing_Unit.sv
ProgCounter.sv		ProgCounter.sv
README.txt		README.txt
Stack.sv		Stack.sv
data_mem.sv		data_mem.sv
flagreg.sv		flagreg.sv
gasm_data.dat		gasm_data.dat
gasm_text.dat		gasm_text.dat
inst_mem.sv		inst_mem.sv
regbank_gunmut.sv		regbank_gunmut.sv

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This is a Gumnut implementation based on Ashenden,  The Designer's guide to VHDL (2019).
Some changes were made for it to be completed. 
Notice Stack module isn´t important for the Gumnut designing