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Add processor aliases back to -print-supported-cpus and -mcpu=help
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They were accidentally dropped in llvm#96249

rdar://140853882
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jroelofs committed Dec 4, 2024
1 parent fdb050a commit 46775c3
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Showing 6 changed files with 101 additions and 22 deletions.
10 changes: 10 additions & 0 deletions clang/test/Driver/print-supported-cpus.c
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@

// REQUIRES: x86-registered-target
// REQUIRES: arm-registered-target
// REQUIRES: aarch64-registered-target

// RUN: %clang --target=x86_64-unknown-linux-gnu --print-supported-cpus 2>&1 | \
// RUN: FileCheck %s --check-prefix=CHECK-X86
Expand All @@ -25,3 +26,12 @@
// CHECK-ARM: cortex-a73
// CHECK-ARM: cortex-a75
// CHECK-ARM: Use -mcpu or -mtune to specify the target's processor.

// RUN: %clang --target=arm64-apple-macosx --print-supported-cpus 2>&1 | \
// RUN: FileCheck %s --check-prefix=CHECK-AARCH64 --implicit-check-not=apple-latest

// CHECK-AARCH64: Target: arm64-apple-macosx
// CHECK-AARCH64: apple-m1
// CHECK-AARCH64: apple-m2
// CHECK-AARCH64: apple-m3
// CHECK-AARCH64: Use -mcpu or -mtune to specify the target's processor.
4 changes: 3 additions & 1 deletion llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,9 @@ class Triple;
class TargetSubtargetInfo : public MCSubtargetInfo {
protected: // Can only create subclasses...
TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
StringRef FS,
ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
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5 changes: 4 additions & 1 deletion llvm/include/llvm/MC/MCSubtargetInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ class MCSubtargetInfo {
Triple TargetTriple;
std::string CPU; // CPU being targeted.
std::string TuneCPU; // CPU being tuned for.
ArrayRef<StringRef> ProcNames; // Processor list, including aliases
ArrayRef<SubtargetFeatureKV> ProcFeatures; // Processor feature list
ArrayRef<SubtargetSubTypeKV> ProcDesc; // Processor descriptions

Expand All @@ -95,7 +96,9 @@ class MCSubtargetInfo {
public:
MCSubtargetInfo(const MCSubtargetInfo &) = default;
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
StringRef FS,
ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS,
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/TargetSubtargetInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16,11 +16,12 @@ using namespace llvm;

TargetSubtargetInfo::TargetSubtargetInfo(
const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
: MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) {}
: MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC, FP) {}

TargetSubtargetInfo::~TargetSubtargetInfo() = default;

Expand Down
52 changes: 34 additions & 18 deletions llvm/lib/MC/MCSubtargetInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -85,16 +85,22 @@ static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
}

/// Return the length of the longest entry in the table.
template <typename T>
static size_t getLongestEntryLength(ArrayRef<T> Table) {
static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) {
size_t MaxLen = 0;
for (auto &I : Table)
MaxLen = std::max(MaxLen, std::strlen(I.Key));
return MaxLen;
}

static size_t getLongestEntryLength(ArrayRef<StringRef> Table) {
size_t MaxLen = 0;
for (StringRef I : Table)
MaxLen = std::max(MaxLen, I.size());
return MaxLen;
}

/// Display help for feature and mcpu choices.
static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
static void Help(ArrayRef<StringRef> CPUNames,
ArrayRef<SubtargetFeatureKV> FeatTable) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
Expand All @@ -104,14 +110,17 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}

// Determine the length of the longest CPU and Feature entries.
unsigned MaxCPULen = getLongestEntryLength(CPUTable);
unsigned MaxCPULen = getLongestEntryLength(CPUNames);
unsigned MaxFeatLen = getLongestEntryLength(FeatTable);

// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
for (auto &CPU : CPUTable)
errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPU.Key,
CPU.Key);
for (auto &CPUName : CPUNames) {
if (CPUName == "apple-latest")
continue;
errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPUName.str().c_str(),
CPUName.str().c_str());
}
errs() << '\n';

// Print the Feature table.
Expand All @@ -127,7 +136,7 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}

/// Display help for mcpu choices only
static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
static void cpuHelp(ArrayRef<StringRef> CPUNames) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
static bool PrintOnce = false;
Expand All @@ -137,8 +146,11 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {

// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
for (auto &CPU : CPUTable)
errs() << "\t" << CPU.Key << "\n";
for (auto &CPU : CPUNames) {
if (CPU == "apple-latest")
continue;
errs() << "\t" << CPU << "\n";
}
errs() << '\n';

errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
Expand All @@ -148,7 +160,9 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
PrintOnce = true;
}

static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
static FeatureBitset getFeatures(MCSubtargetInfo &STI,
StringRef CPU, StringRef TuneCPU, StringRef FS,
ArrayRef<StringRef> ProcNames,
ArrayRef<SubtargetSubTypeKV> ProcDesc,
ArrayRef<SubtargetFeatureKV> ProcFeatures) {
SubtargetFeatures Features(FS);
Expand All @@ -163,7 +177,7 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,

// Check if help is needed
if (CPU == "help")
Help(ProcDesc, ProcFeatures);
Help(ProcNames, ProcFeatures);

// Find CPU entry if CPU name is specified.
else if (!CPU.empty()) {
Expand Down Expand Up @@ -196,9 +210,9 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
for (const std::string &Feature : Features.getFeatures()) {
// Check for help
if (Feature == "+help")
Help(ProcDesc, ProcFeatures);
Help(ProcNames, ProcFeatures);
else if (Feature == "+cpuhelp")
cpuHelp(ProcDesc);
cpuHelp(ProcNames);
else
ApplyFeatureFlag(Bits, Feature, ProcFeatures);
}
Expand All @@ -208,7 +222,7 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,

void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);

if (!TuneCPU.empty())
Expand All @@ -219,20 +233,22 @@ void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,

void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
}

MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
StringRef FS,
ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA,
const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
: TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
OperandCycles(OC), ForwardingPaths(FP) {
InitMCProcessorInfo(CPU, TuneCPU, FS);
Expand Down
49 changes: 48 additions & 1 deletion llvm/utils/TableGen/SubtargetEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSchedule.h"
Expand Down Expand Up @@ -91,6 +92,7 @@ class SubtargetEmitter {
void emitSubtargetInfoMacroCalls(raw_ostream &OS);
unsigned featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
unsigned cpuNames(raw_ostream &OS);
void formItineraryStageString(const std::string &Names,
const Record *ItinData, std::string &ItinString,
unsigned &NStages);
Expand Down Expand Up @@ -297,6 +299,39 @@ unsigned SubtargetEmitter::featureKeyValues(raw_ostream &OS,
return FeatureList.size();
}

unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) {
// Begin processor name table.
OS << "// Sorted array of names of CPU subtypes, including aliases.\n"
<< "extern const llvm::StringRef " << Target << "Names[] = {\n";

std::vector<const Record *> ProcessorList =
Records.getAllDerivedDefinitions("Processor");

std::vector<const Record *> ProcessorAliasList =
Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias");

SmallVector<StringRef> Names;
Names.reserve(ProcessorList.size() + ProcessorAliasList.size());

for (const Record *Processor : ProcessorList) {
StringRef Name = Processor->getValueAsString("Name");
Names.push_back(Name);
}

for (const Record *Rec : ProcessorAliasList) {
auto Name = Rec->getValueAsString("Name");
Names.push_back(Name);
}

llvm::sort(Names);
llvm::interleave(Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n");

// End processor name table.
OS << "};\n";

return Names.size();
}

//
// CPUKeyValues - Emit data of all the subtarget processors. Used by command
// line.
Expand Down Expand Up @@ -1926,13 +1961,14 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< "GenMCSubtargetInfo : public MCSubtargetInfo {\n";
OS << " " << Target << "GenMCSubtargetInfo(const Triple &TT,\n"
<< " StringRef CPU, StringRef TuneCPU, StringRef FS,\n"
<< " ArrayRef<StringRef> PN,\n"
<< " ArrayRef<SubtargetFeatureKV> PF,\n"
<< " ArrayRef<SubtargetSubTypeKV> PD,\n"
<< " const MCWriteProcResEntry *WPR,\n"
<< " const MCWriteLatencyEntry *WL,\n"
<< " const MCReadAdvanceEntry *RA, const InstrStage *IS,\n"
<< " const unsigned *OC, const unsigned *FP) :\n"
<< " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD,\n"
<< " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,\n"
<< " WPR, WL, RA, IS, OC, FP) { }\n\n"
<< " unsigned resolveVariantSchedClass(unsigned SchedClass,\n"
<< " const MCInst *MI, const MCInstrInfo *MCII,\n"
Expand Down Expand Up @@ -2001,6 +2037,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "\n";
unsigned NumProcs = cpuKeyValues(OS, FeatureMap);
OS << "\n";
unsigned NumNames = cpuNames(OS);
OS << "\n";

// MCInstrInfo initialization routine.
emitGenMCSubtargetInfo(OS);
Expand All @@ -2013,6 +2051,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " TuneCPU = AArch64::resolveCPUAlias(TuneCPU);\n";
OS << " return new " << Target
<< "GenMCSubtargetInfo(TT, CPU, TuneCPU, FS, ";
if (NumNames)
OS << Target << "Names, ";
else
OS << "{}, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
Expand Down Expand Up @@ -2096,6 +2138,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {

OS << "#include \"llvm/CodeGen/TargetSchedule.h\"\n\n";
OS << "namespace llvm {\n";
OS << "extern const llvm::StringRef " << Target << "Names[];\n";
OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\n";
OS << "extern const llvm::SubtargetSubTypeKV " << Target << "SubTypeKV[];\n";
OS << "extern const llvm::MCWriteProcResEntry " << Target
Expand All @@ -2119,6 +2162,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " AArch64::resolveCPUAlias(TuneCPU), FS, ";
else
OS << " : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ";
if (NumNames)
OS << "ArrayRef(" << Target << "Names, " << NumNames << "), ";
else
OS << "{}, ";
if (NumFeatures)
OS << "ArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), ";
else
Expand Down

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