Fix linux crash when booting (#176)

* Modify-l2-tag-data-ram-ctl-to-1 * Modify bbl commit number,BBL add Add L2 TRAMICTL and DRAMOCTL setting Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com>
kendryte · Jul 11, 2022 · dcb037e · dcb037e
1 parent 181ce44
commit dcb037e
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diff --git a/package/patches/linux/0013-Modify-l2-tag-data-ram-ctl-to-1.patch b/package/patches/linux/0013-Modify-l2-tag-data-ram-ctl-to-1.patch
@@ -0,0 +1,27 @@
+From 0b0140450ca19ce19f94492c991e75fe75deb9d6 Mon Sep 17 00:00:00 2001
+From: zhaozhongxiang <zhaozhongxiang@canaan-creative.com>
+Date: Fri, 8 Jul 2022 21:12:28 +0800
+Subject: [PATCH] Modify l2 tag data  ram ctl to 1
+
+---
+ arch/riscv/boot/dts/canaan/k510_common/k510.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/riscv/boot/dts/canaan/k510_common/k510.dtsi b/arch/riscv/boot/dts/canaan/k510_common/k510.dtsi
+index 11ba9525..fd8c3eae 100755
+--- a/arch/riscv/boot/dts/canaan/k510_common/k510.dtsi
++++ b/arch/riscv/boot/dts/canaan/k510_common/k510.dtsi
+@@ -70,8 +70,8 @@
+         andes,inst-prefetch = <3>;
+         andes,data-prefetch = <3>;
+         // The value format is <XRAMOCTL XRAMICTL>
+-        andes,tag-ram-ctl = <0 0>;
+-        andes,data-ram-ctl = <0 0>;
++        andes,tag-ram-ctl = <1 0>;
++        andes,data-ram-ctl = <1 0>;
+     };
+
+     pmu: pmu {
+-- 
+2.36.1
+
diff --git a/package/riscv-pk-k510/riscv-pk-k510.mk b/package/riscv-pk-k510/riscv-pk-k510.mk
@@ -4,7 +4,7 @@
 #
 ################################################################################
 
-RISCV_PK_K510_VERSION = 1e666d6c5dbab220d2ca57fbd9bec49702599b75
+RISCV_PK_K510_VERSION = d645baf2964c3088f8cb08b4600e8f9f0fdeca4e
 RISCV_PK_K510_SITE = https://github.com/kendryte/k510_BBL.git
 RISCV_PK_K510_SITE_METHOD = git