add NMI handler to libmips-rt

kiffie · Jul 15, 2023 · 443c35f · 443c35f
1 parent 0ea3efe
commit 443c35f
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Showing 8 changed files with 43 additions and 98 deletions.
diff --git a/mips-rt/Cargo.toml b/mips-rt/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "mips-rt"
-version = "0.3.2"
+version = "0.3.3"
 authors = ["Stephan <kiffie@mailbox.org"]
 edition = "2021"
 repository = "https://github.com/kiffie/pic32-rs"

diff --git a/mips-rt/link.x b/mips-rt/link.x
@@ -12,7 +12,9 @@ INCLUDE memory.x
 /* The entry point is the reset handler */
 ENTRY(_reset);
 
-EXTERN(_gen_exception)
+/* default handlers for general exception and NMI */
+PROVIDE(_general_exception_handler = _default_isr_fn);
+PROVIDE(_nmi_handler = _default_isr_fn);
 
 /* stack */
 PROVIDE(_stack = ORIGIN(data_mem) + LENGTH(data_mem));

diff --git a/mips-rt/native_lib/Makefile b/mips-rt/native_lib/Makefile
@@ -8,12 +8,13 @@
 # The "Quoted section flags are deprecated" warning from pic32-gcc can be
 # ignored.
 CC=pic32-gcc
+AR=pic32-ar
 
 LIB = libmips-rt
 
 CFLAGS = -Wall -mips32r2 -msoft-float -Os -Iinclude
 
-OBJECTS = crt0.o isr_context.o exception_table.o general-exception.o
+OBJECTS = crt0.o isr_context.o exception_table.o exception_context.o
 
 DEPS    = $(patsubst %.o, %.d, $(notdir $(OBJECTS)))
 

diff --git a/mips-rt/native_lib/crt0.S b/mips-rt/native_lib/crt0.S
@@ -52,87 +52,45 @@
 /* This file contains 32-bit assembly code */
        .set nomips16
 
-        ##################################################################
-        # Entry point of the entire application
-        ##################################################################
+##################################################################
+# Entry point of the entire application
+##################################################################
         .section .reset, "ax"
         .align 2
         .set noreorder
         .ent _reset
 
-############################
-# Begin ISA switching code #
-############################
-
-#if defined (__mips_micromips)
-        .set micromips
-#endif
+_reset:
 
+/* This produces the intended code but confuses the disassembler function of rust-objdump
+ * So, leave it deactivated for now.
+ */
 #if (defined(__PIC32_HAS_MICROMIPS)) && (defined(__PIC32_HAS_MIPS32R2))
-_reset:
-        .word 0x10000003     /* MIPS32:    branch forward 0x10 bytes from here  */
+        .word 0x10000004     /* MIPS32:    branch forward 0x14 bytes from here  */
                              /* MicroMIPS: ADDI32 $0, $0, 0x0007 (nop)          */
                              /* DO NOT change the relative branch               */
-
         .word 0x00000000     /* NOP */
 __reset_micromips_isa:
         .set    micromips
-        jal     _startup
-        nop
-
-        .align 2
-        /* Device not in proper ISA mode */
-        .set nomicromips
-__reset_switch_isa:
-        jal _startup
-        nop
-
-#else
-
-_reset:
-        la      t0,_startup
-        jalr    t0
+        la      k0, __reset_mips32_isa
+        jr      k0
         nop
-
+        .set    nomicromips
+__reset_mips32_isa:
 #endif  /* __PIC32_HAS_MICROMIPS */
 
-        .align 2
-        .end _reset
-        .globl _reset
-        .size _reset, .-_reset
-
-        .section .reset.startup, "ax"
-        .align 2
-        .set noreorder
-
-#if defined (__mips_micromips)
-        .set micromips
-#else
-        .set nomicromips
-#endif
-
-############################
-# End ISA switching code   #
-############################
-
-
-        ##################################################################
-        # Startup code
-        ##################################################################
-        .align 2
-        .set noreorder
-        .ent _startup
-_startup:
         ##################################################################
         # If entered because of an NMI, jump to the NMI handler.
         ##################################################################
         mfc0    k0,_CP0_STATUS
-        ext     k0,k0,19,1              # Extract NMI bit
-        beqz    k0,_no_nmi
+        ext     k1,k0,19,1              # Extract NMI bit
+        beqz    k1,_no_nmi
+        nop
+        ins     k0,zero,22,1            # clear the BEV bit
+        mtc0    k0,_CP0_STATUS
+        la      k0, _nmi_handler
+        j       _exception_context
         nop
-#        la      k0,_nmi_handler
-#        jr      k0
-#        nop
 _no_nmi:
 
         ##################################################################
@@ -333,7 +291,10 @@ _data_cond:
 _main_el:
         b       _main_el
         nop
-        .end _startup
+        .align 2
+        .end _reset
+        .globl _reset
+
 
         ##################################################################
         # Boot Exception Vector Handler

diff --git a/mips-rt/native_lib/exception_context.S b/mips-rt/native_lib/exception_context.S
@@ -1,24 +1,25 @@
 /*
- * General exception wrapper
- * Saves all registers on the stack for easy error reporting
+ * Wrapper for exception handlers that saves registers on the stack
  *
- * signature of the general exception handler:
+ * Address of exception handler to be called must be in register k0
+ * This wrapper is not for interrupt exceptions.
+ *
+ * signature of the exception handler called by this wrapper:
  *    pub extern "C" fn _general_exception_handler(cp0_cause: u32, cp0_status: u32);
  *
  */
 
 #include <regdef.h>
 #include <cp0defs.h>
 
-.extern _general_exception_handler
-.section .text.general_exception, "ax"
+.section .text.exception_context, "ax"
 .set noreorder
 .set noat
 .set nomips16
-.globl _general_exception_context
-.ent _general_exception_context
+.globl _exception_context
+.ent _exception_context
 
-_general_exception_context:
+_exception_context:
 
   # Save off the non-callee saved registers that may get mucked with
    addiu sp, sp, -88
@@ -50,24 +51,11 @@ _general_exception_context:
    mfhi t0
    sw t0, 80(sp)
 
-#if defined(__PIC__)
-   lw      t9,%call16(_general_exception_handler)(gp)
-   nop
-   # Pass Cause and Status to the handler function
-   mfc0 a0, _CP0_CAUSE
-   mfc0 a1, _CP0_STATUS
-   jalr    t9
-   nop
-#else
-   la      k0,_general_exception_handler
-   nop
-
    # Pass Cause and Status to the handler function
    mfc0 a0, _CP0_CAUSE
    mfc0 a1, _CP0_STATUS
    jalr    k0
    nop
-#endif
 
    lw t0, 80(sp)
    mthi t0
@@ -97,11 +85,4 @@ _general_exception_context:
    ehb
    eret
 
-  .end _general_exception_context
-
-.weak _general_exception_handler
-.ent _general_exception_handler
-_general_exception_handler:
-        jr      ra
-        nop
-.end _general_exception_handler
+  .end _exception_context
diff --git a/mips-rt/native_lib/exception_table.S b/mips-rt/native_lib/exception_table.S
@@ -21,8 +21,8 @@ _default_isr_fn:
 .ent _gen_exception
 .global _gen_exception
 _gen_exception:
-        la      k0,_general_exception_context
-        jr      k0
+        la      k0,_general_exception_handler
+        j       _exception_context
         nop
 .end _gen_exception
 

diff --git a/mips-rt/native_lib/isr_context.S b/mips-rt/native_lib/isr_context.S
@@ -1,7 +1,7 @@
 /*
- * wrapper for exception handlers that saves registers on the stack
+ * wrapper for interrupt handlers that saves registers on the stack
  *
- * address of exception handler to be called must be in register k0
+ * address of interrupt handler to be called must be in register k0
  *
  */
 

diff --git a/mips-rt/native_lib/libmips-rt.a b/mips-rt/native_lib/libmips-rt.a