platforms/sipeed_tang_primer_25k: swap UART TX & RX, fix TX pin (J1:2…

…0 -> J1:21)
litex-hub · Oct 19, 2023 · 5f69416 · 5f69416
1 parent a4fc45b
commit 5f69416
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/litex_boards/platforms/sipeed_tang_primer_25k.py b/litex_boards/platforms/sipeed_tang_primer_25k.py
@@ -75,8 +75,8 @@
 _dock_io = [
     # Serial.
     ("serial", 0,
-        Subsignal("rx", Pins("J1:20")),
-        Subsignal("tx", Pins("J1:19")),
+        Subsignal("rx", Pins("J1:19")),
+        Subsignal("tx", Pins("J1:21")),
         IOStandard("LVCMOS33")
     ),