sqrl_xcu1525: Add QSFP-0/1 ref clks and rearrange a bit naming.

litex-hub · Jul 10, 2024 · c7b436a · c7b436a
1 parent 00df115
commit c7b436a
Showing 1 changed file with 26 additions and 10 deletions.
diff --git a/litex_boards/platforms/sqrl_xcu1525.py b/litex_boards/platforms/sqrl_xcu1525.py
@@ -259,63 +259,79 @@
     ),
 
     # QSFP-0.
-    ("qsfp", 0,
+    ("qsfp0_refclk0", 0,
+        Subsignal("p", Pins("M11")),
+        Subsignal("n", Pins("M10")),
+    ),
+    ("qsfp0_refclk1", 0,
+        Subsignal("p", Pins("K11")),
+        Subsignal("n", Pins("K10")),
+    ),
+    ("qsfp0", 0,
         Subsignal("txp", Pins("N9 M7 L9 K7")),
         Subsignal("txn", Pins("N8 M6 L8 K6")),
         Subsignal("rxp", Pins("N4 M2 L4 K2")),
         Subsignal("rxn", Pins("N3 M1 L3 K1")),
     ),
-    ("qsfp0_sfp", 0,
+    ("qsfp0_sfp0", 0,
         Subsignal("txp", Pins("N9")),
         Subsignal("txn", Pins("N8")),
         Subsignal("rxp", Pins("N4")),
         Subsignal("rxn", Pins("N3")),
     ),
-    ("qsfp0_sfp", 1,
+    ("qsfp0_sfp1", 0,
         Subsignal("txp", Pins("M7")),
         Subsignal("txn", Pins("M6")),
         Subsignal("rxp", Pins("M2")),
         Subsignal("rxn", Pins("M1")),
     ),
-    ("qsfp0_sfp", 2,
+    ("qsfp0_sfp2", 0,
         Subsignal("txp", Pins("L9")),
         Subsignal("txn", Pins("L8")),
         Subsignal("rxp", Pins("L4")),
         Subsignal("rxn", Pins("L3")),
     ),
-    ("qsfp0_sfp", 3,
+    ("qsfp0_sfp3", 0,
         Subsignal("txp", Pins("K7")),
         Subsignal("txn", Pins("K6")),
         Subsignal("rxp", Pins("K2")),
         Subsignal("rxn", Pins("K1")),
     ),
 
     # QSFP-1.
-    ("qsfp", 1,
+    ("qsfp1_refclk0", 0,
+        Subsignal("p", Pins("T11")),
+        Subsignal("n", Pins("T10")),
+    ),
+    ("qsfp2_refclk1", 0,
+        Subsignal("p", Pins("P11")),
+        Subsignal("n", Pins("P10")),
+    ),
+    ("qsfp1", 0,
         Subsignal("txp", Pins("U9 T7 R9 P7")),
         Subsignal("txn", Pins("U8 T6 R8 P6")),
         Subsignal("rxp", Pins("U4 T2 R4 P2")),
         Subsignal("rxn", Pins("U3 T1 R3 P1")),
     ),
-    ("qsfp1_sfp", 0,
+    ("qsfp1_sfp0", 0,
         Subsignal("txp", Pins("U9")),
         Subsignal("txn", Pins("U8")),
         Subsignal("rxp", Pins("U4")),
         Subsignal("rxn", Pins("U3")),
     ),
-    ("qsfp1_sfp", 1,
+    ("qsfp1_sfp1", 0,
         Subsignal("txp", Pins("T7")),
         Subsignal("txn", Pins("T6")),
         Subsignal("rxp", Pins("T2")),
         Subsignal("rxn", Pins("T1")),
     ),
-    ("qsfp1_sfp", 2,
+    ("qsfp1_sfp2", 0,
         Subsignal("txp", Pins("R9")),
         Subsignal("txn", Pins("R8")),
         Subsignal("rxp", Pins("R4")),
         Subsignal("rxn", Pins("R3")),
     ),
-    ("qsfp1_sfp", 3,
+    ("qsfp1_sfp3", 0,
         Subsignal("txp", Pins("P7")),
         Subsignal("txn", Pins("P6")),
         Subsignal("rxp", Pins("P2")),