targets/machdyne_vanille: set uart_name to stub

litex-hub · Jun 22, 2024 · cb43cdf · cb43cdf
1 parent a1df389
commit cb43cdf
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/litex_boards/targets/machdyne_vanille.py b/litex_boards/targets/machdyne_vanille.py
@@ -111,6 +111,9 @@ def __init__(self, revision="v0", device="12F", sdram_device="W9825G6KH6", sdram
         self.crg = _CRG(platform, sys_clk_freq, sdram_rate=sdram_rate)
 
         # SoCCore ----------------------------------------------------------------------------------
+
+        kwargs['uart_name'] = "stub"
+
         SoCCore.__init__(self, platform, sys_clk_freq, ident="LiteX SoC on Vanille", **kwargs)
 
         # DRAM -------------------------------------------------------------------------------------