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[PhaseOrdering][X86] Add additional test coverage for #49736
I've kept the old PR50392 tag since this is such an old issue....
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64 -O3 -S < %s | FileCheck %s --check-prefixes=SSE | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v2 -O3 -S < %s | FileCheck %s --check-prefixes=SSE | ||
; RUN: opt -mtriple=x86_64-- -mcpu=btver2 -O3 -S < %s | FileCheck %s --check-prefixes=AVX,AVX1 | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v3 -O3 -S < %s | FileCheck %s --check-prefixes=AVX,AVX2 | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=SSE | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v2 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=SSE | ||
; RUN: opt -mtriple=x86_64-- -mcpu=btver2 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=AVX,AVX1 | ||
; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v3 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=AVX,AVX2 | ||
|
||
define <4 x double> @PR50392(<4 x double> %a, <4 x double> %b) { | ||
; SSE-LABEL: @PR50392( | ||
; SSE-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <2 x i32> <i32 0, i32 4> | ||
; SSE-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5> | ||
; SSE-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]] | ||
; SSE-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison> | ||
; SSE-NEXT: [[VECEXT10:%.*]] = extractelement <4 x double> [[B]], i64 2 | ||
; SSE-NEXT: [[VECEXT11:%.*]] = extractelement <4 x double> [[B]], i64 3 | ||
; SSE-NEXT: [[ADD12:%.*]] = fadd double [[VECEXT10]], [[VECEXT11]] | ||
; SSE-NEXT: [[SHUFFLE:%.*]] = insertelement <4 x double> [[TMP4]], double [[ADD12]], i64 3 | ||
; SSE-NEXT: ret <4 x double> [[SHUFFLE]] | ||
; | ||
; AVX1-LABEL: @PR50392( | ||
; AVX1-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <2 x i32> <i32 0, i32 4> | ||
; AVX1-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5> | ||
; AVX1-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]] | ||
; AVX1-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison> | ||
; AVX1-NEXT: [[VECEXT10:%.*]] = extractelement <4 x double> [[B]], i64 2 | ||
; AVX1-NEXT: [[VECEXT11:%.*]] = extractelement <4 x double> [[B]], i64 3 | ||
; AVX1-NEXT: [[ADD12:%.*]] = fadd double [[VECEXT10]], [[VECEXT11]] | ||
; AVX1-NEXT: [[SHUFFLE:%.*]] = insertelement <4 x double> [[TMP4]], double [[ADD12]], i64 3 | ||
; AVX1-NEXT: ret <4 x double> [[SHUFFLE]] | ||
; | ||
; AVX2-LABEL: @PR50392( | ||
; AVX2-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <2 x i32> <i32 0, i32 4> | ||
; AVX2-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5> | ||
; AVX2-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]] | ||
; AVX2-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison> | ||
; AVX2-NEXT: [[SHIFT:%.*]] = shufflevector <4 x double> [[B]], <4 x double> poison, <4 x i32> <i32 poison, i32 poison, i32 3, i32 poison> | ||
; AVX2-NEXT: [[TMP5:%.*]] = fadd <4 x double> [[B]], [[SHIFT]] | ||
; AVX2-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[TMP4]], <4 x double> [[TMP5]], <4 x i32> <i32 0, i32 poison, i32 2, i32 6> | ||
; AVX2-NEXT: ret <4 x double> [[SHUFFLE]] | ||
; | ||
%vecext = extractelement <4 x double> %a, i32 0 | ||
%vecext1 = extractelement <4 x double> %a, i32 1 | ||
%add = fadd double %vecext, %vecext1 | ||
%vecinit = insertelement <4 x double> poison, double %add, i32 0 | ||
%vecext2 = extractelement <4 x double> %a, i32 2 | ||
%vecext3 = extractelement <4 x double> %a, i32 3 | ||
%add4 = fadd double %vecext2, %vecext3 | ||
%vecinit5 = insertelement <4 x double> %vecinit, double %add4, i32 1 | ||
%vecext6 = extractelement <4 x double> %b, i32 0 | ||
%vecext7 = extractelement <4 x double> %b, i32 1 | ||
%add8 = fadd double %vecext6, %vecext7 | ||
%vecinit9 = insertelement <4 x double> %vecinit5, double %add8, i32 2 | ||
%vecext10 = extractelement <4 x double> %b, i32 2 | ||
%vecext11 = extractelement <4 x double> %b, i32 3 | ||
%add12 = fadd double %vecext10, %vecext11 | ||
%vecinit13 = insertelement <4 x double> %vecinit9, double %add12, i32 3 | ||
%shuffle = shufflevector <4 x double> %vecinit13, <4 x double> %a, <4 x i32> <i32 0, i32 poison, i32 2, i32 3> | ||
ret <4 x double> %shuffle | ||
} | ||
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: | ||
; AVX: {{.*}} |