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[InstCombine] Pre-commit tests (NFC)
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@AZero13
AZero13 committed May 21, 2024
1 parent 1c58208 commit 4881e14
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259 changes: 259 additions & 0 deletions llvm/test/Transforms/InstCombine/ashr-lshr.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -604,3 +604,262 @@ define <2 x i8> @ashr_known_pos_exact_vec(<2 x i8> %x, <2 x i8> %y) {
%r = ashr exact <2 x i8> %p, %y
ret <2 x i8> %r
}

define i32 @lshr_mul_times_3_div_2(i32 %0) {
; CHECK-LABEL: @lshr_mul_times_3_div_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 3
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nsw nuw i32 %0, 3
%lshr = lshr i32 %mul, 1
ret i32 %lshr
}

define i32 @lshr_mul_times_3_div_2_exact(i32 %x) {
; CHECK-LABEL: @lshr_mul_times_3_div_2_exact(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 3
; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nsw i32 %x, 3
%lshr = lshr exact i32 %mul, 1
ret i32 %lshr
}

; Negative test

define i32 @lshr_mul_times_3_div_2_no_flags(i32 %0) {
; CHECK-LABEL: @lshr_mul_times_3_div_2_no_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP0:%.*]], 3
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul i32 %0, 3
%lshr = lshr i32 %mul, 1
ret i32 %lshr
}

; Negative test

define i32 @mul_times_3_div_2_multiuse_lshr(i32 %x) {
; CHECK-LABEL: @mul_times_3_div_2_multiuse_lshr(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 1
; CHECK-NEXT: call void @use(i32 [[MUL]])
; CHECK-NEXT: ret i32 [[RES]]
;
%mul = mul nuw i32 %x, 3
%res = lshr i32 %mul, 1
call void @use(i32 %mul)
ret i32 %res
}

define i32 @lshr_mul_times_3_div_2_exact_2(i32 %x) {
; CHECK-LABEL: @lshr_mul_times_3_div_2_exact_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nuw i32 %x, 3
%lshr = lshr exact i32 %mul, 1
ret i32 %lshr
}

define i32 @lshr_mul_times_5_div_4(i32 %0) {
; CHECK-LABEL: @lshr_mul_times_5_div_4(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 5
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nsw nuw i32 %0, 5
%lshr = lshr i32 %mul, 2
ret i32 %lshr
}

define i32 @lshr_mul_times_5_div_4_exact(i32 %x) {
; CHECK-LABEL: @lshr_mul_times_5_div_4_exact(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 5
; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nsw i32 %x, 5
%lshr = lshr exact i32 %mul, 2
ret i32 %lshr
}

; Negative test

define i32 @lshr_mul_times_5_div_4_no_flags(i32 %0) {
; CHECK-LABEL: @lshr_mul_times_5_div_4_no_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP0:%.*]], 5
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul i32 %0, 5
%lshr = lshr i32 %mul, 2
ret i32 %lshr
}

; Negative test

define i32 @mul_times_5_div_4_multiuse_lshr(i32 %x) {
; CHECK-LABEL: @mul_times_5_div_4_multiuse_lshr(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 5
; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 2
; CHECK-NEXT: call void @use(i32 [[MUL]])
; CHECK-NEXT: ret i32 [[RES]]
;
%mul = mul nuw i32 %x, 5
%res = lshr i32 %mul, 2
call void @use(i32 %mul)
ret i32 %res
}

define i32 @lshr_mul_times_5_div_4_exact_2(i32 %x) {
; CHECK-LABEL: @lshr_mul_times_5_div_4_exact_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 5
; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[LSHR]]
;
%mul = mul nuw i32 %x, 5
%lshr = lshr exact i32 %mul, 2
ret i32 %lshr
}

define i32 @ashr_mul_times_3_div_2(i32 %0) {
; CHECK-LABEL: @ashr_mul_times_3_div_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 3
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nuw nsw i32 %0, 3
%ashr = ashr i32 %mul, 1
ret i32 %ashr
}

define i32 @ashr_mul_times_3_div_2_exact(i32 %x) {
; CHECK-LABEL: @ashr_mul_times_3_div_2_exact(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 3
; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nsw i32 %x, 3
%ashr = ashr exact i32 %mul, 1
ret i32 %ashr
}

; Negative test

define i32 @ashr_mul_times_3_div_2_no_flags(i32 %0) {
; CHECK-LABEL: @ashr_mul_times_3_div_2_no_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP0:%.*]], 3
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul i32 %0, 3
%ashr = ashr i32 %mul, 1
ret i32 %ashr
}

; Negative test

define i32 @ashr_mul_times_3_div_2_no_nsw(i32 %0) {
; CHECK-LABEL: @ashr_mul_times_3_div_2_no_nsw(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[TMP0:%.*]], 3
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nuw i32 %0, 3
%ashr = ashr i32 %mul, 1
ret i32 %ashr
}

; Negative test

define i32 @mul_times_3_div_2_multiuse_ashr(i32 %x) {
; CHECK-LABEL: @mul_times_3_div_2_multiuse_ashr(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 3
; CHECK-NEXT: [[RES:%.*]] = ashr i32 [[MUL]], 1
; CHECK-NEXT: call void @use(i32 [[MUL]])
; CHECK-NEXT: ret i32 [[RES]]
;
%mul = mul nsw i32 %x, 3
%res = ashr i32 %mul, 1
call void @use(i32 %mul)
ret i32 %res
}

define i32 @ashr_mul_times_3_div_2_exact_2(i32 %x) {
; CHECK-LABEL: @ashr_mul_times_3_div_2_exact_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 3
; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 1
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nsw i32 %x, 3
%ashr = ashr exact i32 %mul, 1
ret i32 %ashr
}

define i32 @ashr_mul_times_5_div_4(i32 %0) {
; CHECK-LABEL: @ashr_mul_times_5_div_4(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 5
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nuw nsw i32 %0, 5
%ashr = ashr i32 %mul, 2
ret i32 %ashr
}

define i32 @ashr_mul_times_5_div_4_exact(i32 %x) {
; CHECK-LABEL: @ashr_mul_times_5_div_4_exact(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 5
; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nsw i32 %x, 5
%ashr = ashr exact i32 %mul, 2
ret i32 %ashr
}

; Negative test

define i32 @ashr_mul_times_5_div_4_no_flags(i32 %0) {
; CHECK-LABEL: @ashr_mul_times_5_div_4_no_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP0:%.*]], 5
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul i32 %0, 5
%ashr = ashr i32 %mul, 2
ret i32 %ashr
}

; Negative test

define i32 @mul_times_5_div_4_multiuse_ashr(i32 %x) {
; CHECK-LABEL: @mul_times_5_div_4_multiuse_ashr(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 5
; CHECK-NEXT: [[RES:%.*]] = ashr i32 [[MUL]], 2
; CHECK-NEXT: call void @use(i32 [[MUL]])
; CHECK-NEXT: ret i32 [[RES]]
;
%mul = mul nsw i32 %x, 5
%res = ashr i32 %mul, 2
call void @use(i32 %mul)
ret i32 %res
}

define i32 @ashr_mul_times_5_div_4_exact_2(i32 %x) {
; CHECK-LABEL: @ashr_mul_times_5_div_4_exact_2(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 5
; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 2
; CHECK-NEXT: ret i32 [[ASHR]]
;
%mul = mul nsw i32 %x, 5
%ashr = ashr exact i32 %mul, 2
ret i32 %ashr
}

declare void @use(i32)
15 changes: 14 additions & 1 deletion llvm/test/Transforms/InstCombine/lshr.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -628,7 +628,7 @@ define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
ret i32 %t
}

; Negative test
; Negative test (but simplifies into a different transform)

define i32 @mul_splat_fold_no_nuw(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_no_nuw(
Expand All @@ -641,6 +641,19 @@ define i32 @mul_splat_fold_no_nuw(i32 %x) {
ret i32 %t
}

; Negative test

define i32 @mul_splat_fold_no_flags(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_no_flags(
; CHECK-NEXT: [[M:%.*]] = mul i32 [[X:%.*]], 65537
; CHECK-NEXT: [[T:%.*]] = lshr i32 [[M]], 16
; CHECK-NEXT: ret i32 [[T]]
;
%m = mul i32 %x, 65537
%t = lshr i32 %m, 16
ret i32 %t
}

; Negative test (but simplifies before we reach the mul_splat transform)- need more than 2 bits

define i2 @mul_splat_fold_too_narrow(i2 %x) {
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