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[MLIR][VCIX] Support VCIX intrinsics in LLVMIR dialect (#75875)
The changeset extends LLVMIR intrinsics with VCIX intrinsics. The VCIX intrinsics allow MLIR users to interact with RISC-V co-processors that are compatible with `XSfvcp` extension Source: https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
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//===- VCIXDialect.h - MLIR VCIX IR dialect -------------------*- C++ ---*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// The file defines the basic operations for the VCIX dialect. | ||
// | ||
// The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism | ||
// to extend application processors with custom coprocessors and | ||
// variable-latency arithmetic units. The interface offers throughput comparable | ||
// to that of standard RISC-V vector instructions. To accelerate performance, | ||
// system designers may use VCIX as a low-latency, high-throughput interface to | ||
// a coprocessor | ||
// | ||
// https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_ | ||
#define MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_ | ||
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#include "mlir/Bytecode/BytecodeOpInterface.h" | ||
#include "mlir/Dialect/LLVMIR/LLVMDialect.h" | ||
#include "mlir/IR/Dialect.h" | ||
#include "mlir/IR/OpDefinition.h" | ||
#include "mlir/Interfaces/SideEffectInterfaces.h" | ||
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///// Ops ///// | ||
#define GET_ATTRDEF_CLASSES | ||
#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.h.inc" | ||
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#define GET_OP_CLASSES | ||
#include "mlir/Dialect/LLVMIR/VCIXOps.h.inc" | ||
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#include "mlir/Dialect/LLVMIR/VCIXOpsDialect.h.inc" | ||
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#endif /* MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_ */ |
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//===-- VCIX.td - VCIX dialect operation definitions *- tablegen -*--------===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// The file defines the basic operations for the VCIX dialect. | ||
// | ||
// The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism | ||
// to extend application processors with custom coprocessors and | ||
// variable-latency arithmetic units. The interface offers throughput comparable | ||
// to that of standard RISC-V vector instructions. To accelerate performance, | ||
// system designers may use VCIX as a low-latency, high-throughput interface to | ||
// a coprocessor | ||
// | ||
// https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef VCIXIR_OPS | ||
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include "mlir/IR/OpBase.td" | ||
include "mlir/Dialect/LLVMIR/LLVMOpBase.td" | ||
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//===----------------------------------------------------------------------===// | ||
// VCIX dialect definition. | ||
//===----------------------------------------------------------------------===// | ||
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def VCIX_Dialect : Dialect { | ||
let name = "vcix"; | ||
let cppNamespace = "::mlir::vcix"; | ||
let dependentDialects = ["LLVM::LLVMDialect"]; | ||
let description = [{ | ||
The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism | ||
to extend application processors with custom coprocessors and | ||
variable-latency arithmetic units. The interface offers throughput comparable | ||
to that of standard RISC-V vector instructions. To accelerate performance, | ||
system designers may use VCIX as a low-latency, high-throughput interface to | ||
a coprocessor | ||
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https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software | ||
}]; | ||
} | ||
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// Special version for intrinsic version where int attr is zext to i32 or i64 | ||
// depending on xlen of the target. | ||
def VCIX_VectorOrScalar | ||
: AnyTypeOf<[LLVM_AnyVector, I<64>, I<32>, F<16>, F<32>, F<64>]>; | ||
def VCIX_OpcodeAttr : AnyAttrOf<[I32Attr, I64Attr]>; | ||
def VCIX_Register : AnyTypeOf<[I32, I64]>; | ||
def VCIX_ImmAttr : AnyAttrOf<[I32Attr, I64Attr]>; | ||
def VCIX_VL : AnyTypeOf<[I<64>, I<32>]>; | ||
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class VCIX_Op<string mnemonic, list<Trait> traits = []> | ||
: LLVM_OpBase<VCIX_Dialect, mnemonic, traits> { | ||
} | ||
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def VCIX_BinaryImmOp : VCIX_Op<"v.iv">, | ||
Results<(outs LLVM_AnyVector: $res)>, | ||
Arguments<(ins VCIX_OpcodeAttr: $opcode, | ||
LLVM_AnyVector: $vs2, | ||
VCIX_ImmAttr: $imm, | ||
Optional<VCIX_VL>: $vl)> { | ||
let summary = "Binary VCIX operation with an immediate second operand"; | ||
let description = [{ | ||
Binary VCIX operation with an immediate second operand. | ||
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Correponds to: | ||
|Mnemonic|funct6|vm|rs2|rs1|funct3|rd|Destination|Sources| | ||
|--|--|--|--|--|--|--|--|--| | ||
|sf.vc.v.iv|0010--|0|vs2|simm|011|vd|vector vd| simm[4:0] vector vs2| | ||
}]; | ||
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string llvmBuilder = [{ | ||
llvm::Type *xlen =getXlenType($opcode, moduleTranslation); | ||
llvm::Value *opcodeConst = mlir::LLVM::detail::getLLVMConstant( | ||
xlen, $opcode, $_location, moduleTranslation); | ||
llvm::Value *immConst = mlir::LLVM::detail::getLLVMConstant( | ||
xlen, $imm, $_location, moduleTranslation); | ||
VectorType vt = op.getResult().getType().cast<VectorType>(); | ||
llvm::Value *vl = | ||
createVL(builder, $vl, vt, xlen, $_location, moduleTranslation); | ||
$res = createIntrinsicCall( | ||
builder, llvm::Intrinsic::riscv_sf_vc_v_iv_se, | ||
{opcodeConst, $vs2, immConst, vl}, | ||
{$_resultType, xlen, $vs2->getType(), xlen, xlen}); | ||
}]; | ||
} | ||
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def VCIX_BinaryOp : VCIX_Op<"v.sv">, | ||
Results<(outs LLVM_AnyVector: $res)>, | ||
Arguments<(ins VCIX_OpcodeAttr: $opcode, | ||
LLVM_AnyVector: $vs2, | ||
VCIX_VectorOrScalar: $op, | ||
Optional<VCIX_VL>: $vl)> { | ||
let summary = "Binary VCIX operation"; | ||
let description = [{ | ||
Binary VCIX operation with an integer scalar, or floating pointer scalar or | ||
vector second operand. | ||
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Correponds to: | ||
|Mnemonic|funct6|vm|rs2|rs1|funct3|rd|Destination| Sources| | ||
|--|--|--|--|--|--|--|--|--|--| | ||
|sf.vc.v.vv|0010--|0|vs2|vs1|000|vd|vector vd|vector vs1, vector vs| | ||
|sf.vc.v.xv|0010--|0|vs2|xs1|100|vd|vector vd|scalar xs1, vector vs2| | ||
|sf.vc.v.fv|0010--|0|vs2|fs1|101|vd|vector vd|scalar fs1, vector vs2| | ||
}]; | ||
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string llvmBuilder = [{ | ||
llvm::Type *xlen = getXlenType($opcode, moduleTranslation); | ||
llvm::Value *opcodeConst = mlir::LLVM::detail::getLLVMConstant( | ||
xlen, $opcode, $_location, moduleTranslation); | ||
llvm::Intrinsic::ID id; | ||
llvm::Type *opType = $op->getType(); | ||
if (opType->isVectorTy()) { | ||
id = llvm::Intrinsic::riscv_sf_vc_v_vv_se; | ||
} else if (opType->isIntegerTy()) { | ||
id = llvm::Intrinsic::riscv_sf_vc_v_xv_se; | ||
} else { | ||
id = llvm::Intrinsic::riscv_sf_vc_v_fv_se; | ||
} | ||
VectorType vt = op.getResult().getType().cast<VectorType>(); | ||
llvm::Value *vl = | ||
createVL(builder, $vl, vt, xlen, $_location, moduleTranslation); | ||
$res = createIntrinsicCall( | ||
builder, id, {opcodeConst, $vs2, $op, vl}, | ||
{$_resultType, xlen, $vs2->getType(), $op->getType(), xlen}); | ||
}]; | ||
} | ||
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#endif // VCIXIR_OPS |
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mlir/include/mlir/Target/LLVMIR/Dialect/VCIX/VCIXToLLVMIRTranslation.h
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//===- VCIXToLLVMIRTranslation.h - VCIX to LLVM IR ------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This provides registration calls for VCIX dialect to LLVM IR translation. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H | ||
#define MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H | ||
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namespace mlir { | ||
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class DialectRegistry; | ||
class MLIRContext; | ||
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/// Register the VCIX dialect and the translation from it to the LLVM IR in the | ||
/// given registry. | ||
void registerVCIXDialectTranslation(DialectRegistry ®istry); | ||
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/// Register the VCIX dialect and the translation from it in the registry | ||
/// associated with the given context. | ||
void registerVCIXDialectTranslation(MLIRContext &context); | ||
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} // namespace mlir | ||
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#endif // MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H |
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//===- VCIXDialect.cpp - MLIR VCIX ops implementation ---------------------===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This file implements the VCIX dialect and its operations. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "mlir/Dialect/LLVMIR/VCIXDialect.h" | ||
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#include "mlir/Dialect/GPU/IR/CompilationInterfaces.h" | ||
#include "mlir/Dialect/LLVMIR/LLVMDialect.h" | ||
#include "mlir/IR/Builders.h" | ||
#include "mlir/IR/BuiltinTypes.h" | ||
#include "mlir/IR/DialectImplementation.h" | ||
#include "mlir/IR/MLIRContext.h" | ||
#include "mlir/IR/Operation.h" | ||
#include "llvm/ADT/TypeSwitch.h" | ||
#include "llvm/AsmParser/Parser.h" | ||
#include "llvm/IR/Attributes.h" | ||
#include "llvm/IR/Function.h" | ||
#include "llvm/IR/Type.h" | ||
#include "llvm/Support/SourceMgr.h" | ||
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using namespace mlir; | ||
using namespace vcix; | ||
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#include "mlir/Dialect/LLVMIR/VCIXOpsDialect.cpp.inc" | ||
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//===----------------------------------------------------------------------===// | ||
// VCIXDialect initialization, type parsing, and registration. | ||
//===----------------------------------------------------------------------===// | ||
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void VCIXDialect::initialize() { | ||
addOperations< | ||
#define GET_OP_LIST | ||
#include "mlir/Dialect/LLVMIR/VCIXOps.cpp.inc" | ||
>(); | ||
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addAttributes< | ||
#define GET_ATTRDEF_LIST | ||
#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.cpp.inc" | ||
>(); | ||
} | ||
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#define GET_OP_CLASSES | ||
#include "mlir/Dialect/LLVMIR/VCIXOps.cpp.inc" | ||
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#define GET_ATTRDEF_CLASSES | ||
#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.cpp.inc" |
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add_mlir_translation_library(MLIRVCIXToLLVMIRTranslation | ||
VCIXToLLVMIRTranslation.cpp | ||
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DEPENDS | ||
MLIRVCIXConversionsIncGen | ||
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LINK_COMPONENTS | ||
Core | ||
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LINK_LIBS PUBLIC | ||
MLIRIR | ||
MLIRLLVMDialect | ||
MLIRVCIXDialect | ||
MLIRSupport | ||
MLIRTargetLLVMIRExport | ||
) |
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