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fixup! use vadd in tests
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@michaelmaitland
michaelmaitland committed Dec 6, 2024
1 parent 4cb75a2 commit cbe89ca
Showing 1 changed file with 24 additions and 32 deletions.
56 changes: 24 additions & 32 deletions llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1248,27 +1248,25 @@ define <vscale x 4 x i64> @vwmulu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
ret <vscale x 4 x i64> %2
}

define <vscale x 4 x i64> @vwmacc_vv(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, <vscale x 4 x i64> %d, iXLen %vl) {
define <vscale x 4 x i32> @vwmacc_vv(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, <vscale x 4 x i32> %d, iXLen %vl) {
; NOVLOPT-LABEL: vwmacc_vv:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vsetvli a1, zero, e16, m1, tu, ma
; NOVLOPT-NEXT: vwmacc.vv v8, v10, v11
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma
; NOVLOPT-NEXT: vwmacc.vv v12, v8, v8
; NOVLOPT-NEXT: vmv4r.v v8, v12
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
; NOVLOPT-NEXT: vadd.vv v8, v8, v12
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vwmacc_vv:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vsetvli zero, a0, e16, m1, tu, ma
; VLOPT-NEXT: vwmacc.vv v8, v10, v11
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, tu, ma
; VLOPT-NEXT: vwmacc.vv v12, v8, v8
; VLOPT-NEXT: vmv4r.v v8, v12
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vadd.vv v8, v8, v12
; VLOPT-NEXT: ret
%1 = call <vscale x 4 x i32> @llvm.riscv.vwmacc.nxv4i32.nxv4i16(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i64> @llvm.riscv.vwmacc.nxv4i32.nxv4i16(<vscale x 4 x i64> %d, <vscale x 4 x i32> %1, <vscale x 4 x i32> %1, iXLen %vl, iXLen 0)
ret <vscale x 4 x i64> %2
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %d, iXLen %vl)
ret <vscale x 4 x i32> %2
}

define <vscale x 4 x i32> @vwmacc_vx(<vscale x 4 x i32> %a, i16 %b, <vscale x 4 x i16> %c, iXLen %vl) {
Expand All @@ -1292,52 +1290,46 @@ define <vscale x 4 x i32> @vwmacc_vx(<vscale x 4 x i32> %a, i16 %b, <vscale x 4
ret <vscale x 4 x i32> %2
}

define <vscale x 4 x i64> @vwmaccu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, <vscale x 4 x i64> %d, iXLen %vl) {
define <vscale x 4 x i32> @vwmaccu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, <vscale x 4 x i32> %d, iXLen %vl) {
; NOVLOPT-LABEL: vwmaccu_vv:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vmv2r.v v16, v8
; NOVLOPT-NEXT: vsetvli a1, zero, e16, m1, tu, ma
; NOVLOPT-NEXT: vwmaccu.vv v16, v10, v11
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma
; NOVLOPT-NEXT: vwmaccu.vv v12, v8, v16
; NOVLOPT-NEXT: vmv4r.v v8, v12
; NOVLOPT-NEXT: vwmaccu.vv v8, v10, v11
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
; NOVLOPT-NEXT: vadd.vv v8, v8, v12
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vwmaccu_vv:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vmv2r.v v16, v8
; VLOPT-NEXT: vsetvli zero, a0, e16, m1, tu, ma
; VLOPT-NEXT: vwmaccu.vv v16, v10, v11
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, tu, ma
; VLOPT-NEXT: vwmaccu.vv v12, v8, v16
; VLOPT-NEXT: vmv4r.v v8, v12
; VLOPT-NEXT: vwmaccu.vv v8, v10, v11
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vadd.vv v8, v8, v12
; VLOPT-NEXT: ret
%1 = call <vscale x 4 x i32> @llvm.riscv.vwmaccu.nxv4i32.nxv4i16(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i64> @llvm.riscv.vwmaccu.nxv4i64.nxv4i32(<vscale x 4 x i64> %d, <vscale x 4 x i32> %a, <vscale x 4 x i32> %1, iXLen %vl, iXLen 0)
ret <vscale x 4 x i64> %2
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %d, iXLen %vl)
ret <vscale x 4 x i32> %2
}

define <vscale x 4 x i64> @vwmaccu_vx(<vscale x 4 x i32> %a, i16 %b, <vscale x 4 x i16> %c, <vscale x 4 x i64> %d, i32 %e, iXLen %vl) {
define <vscale x 4 x i32> @vwmaccu_vx(<vscale x 4 x i32> %a, i16 %b, <vscale x 4 x i16> %c, <vscale x 4 x i32> %d, i32 %e, iXLen %vl) {
; NOVLOPT-LABEL: vwmaccu_vx:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vsetvli a3, zero, e16, m1, tu, ma
; NOVLOPT-NEXT: vsetvli a1, zero, e16, m1, tu, ma
; NOVLOPT-NEXT: vwmaccu.vx v8, a0, v10
; NOVLOPT-NEXT: vsetvli zero, a2, e32, m2, tu, ma
; NOVLOPT-NEXT: vwmaccu.vx v12, a1, v8
; NOVLOPT-NEXT: vmv4r.v v8, v12
; NOVLOPT-NEXT: vsetvli zero, a2, e32, m2, ta, ma
; NOVLOPT-NEXT: vadd.vv v8, v8, v12
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vwmaccu_vx:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vsetvli zero, a2, e16, m1, tu, ma
; VLOPT-NEXT: vwmaccu.vx v8, a0, v10
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, tu, ma
; VLOPT-NEXT: vwmaccu.vx v12, a1, v8
; VLOPT-NEXT: vmv4r.v v8, v12
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vadd.vv v8, v8, v12
; VLOPT-NEXT: ret
%1 = call <vscale x 4 x i32> @llvm.riscv.vwmaccu.nxv4i32.i16(<vscale x 4 x i32> %a, i16 %b, <vscale x 4 x i16> %c, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i64> @llvm.riscv.vwmaccu.nxv4i64.i32(<vscale x 4 x i64> %d, i32 %e, <vscale x 4 x i32> %1, iXLen %vl, iXLen 0)
ret <vscale x 4 x i64> %2
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %d, iXLen %vl)
ret <vscale x 4 x i32> %2
}

define <vscale x 4 x i32> @vwmaccsu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c, iXLen %vl) {
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