-
Notifications
You must be signed in to change notification settings - Fork 12.7k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[ARM] clang/LLVM silently switches to the soft-float ABI if an FPU-less CPU is specified for a hard-float target #110383
Comments
X86 has a similar issue, where |
@llvm/issue-subscribers-clang-driver Author: Chris Copeland (chrisnc)
In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.
|
…sed. Currently, compiling for eabihf with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Fixes llvm#110383.
…sed. Currently, compiling for eabihf with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Fixes llvm#110383.
@llvm/issue-subscribers-backend-arm Author: Chris Copeland (chrisnc)
In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.
|
Yeah, that makes sense. Ideally it would be an error in llvm as well, in a way that the logic does not live in clang but can be reused by other frontends.
|
A similar issue exists with target features: if I pass |
That would be great :)
|
…sed. Currently, compiling for an eabihf target with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Update all ARM tests that were using an affected combination to enable the necessary FPU features or use a soft-float ABI. [clang] Remove the warning from clang that detected this case only if -mfloat-abi=hard or -mhard-float were specified explicitly. Fixes llvm#110383.
…sed. Currently, compiling for an eabihf target with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Update all ARM tests that were using an affected combination to enable the necessary FPU features or use a soft-float ABI. [clang] Remove the warning from clang that detected this case only if -mfloat-abi=hard or -mhard-float were specified explicitly. Fixes llvm#110383.
…sed. Currently, compiling for an eabihf target with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Update all ARM tests that were using an affected combination to enable the necessary FPU features or use a soft-float ABI. [clang] Remove the warning from clang that detected this case only if -mfloat-abi=hard or -mhard-float were specified explicitly. Fixes llvm#110383.
In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.
https://godbolt.org/z/89YGKW79P
The text was updated successfully, but these errors were encountered: