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[ARM] clang/LLVM silently switches to the soft-float ABI if an FPU-less CPU is specified for a hard-float target #110383

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chrisnc opened this issue Sep 28, 2024 · 7 comments · May be fixed by #111334
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backend:ARM clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl'

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@chrisnc
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chrisnc commented Sep 28, 2024

In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.

https://godbolt.org/z/89YGKW79P

@github-actions github-actions bot added the clang Clang issues not falling into any other category label Sep 28, 2024
@RalfJung
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RalfJung commented Sep 29, 2024

X86 has a similar issue, where -x87 on a typical hard-float target will silently switch to the soft-float ABI. IMO it'd be better to error there, too, so that an explicit +soft-float is required to use the soft-float ABI -- that avoids nasty surprises where code doesn't use the ABI it is expected to use.

@EugeneZelenko EugeneZelenko added clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' and removed clang Clang issues not falling into any other category labels Sep 29, 2024
@llvmbot
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llvmbot commented Sep 29, 2024

@llvm/issue-subscribers-clang-driver

Author: Chris Copeland (chrisnc)

In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.

https://godbolt.org/z/89YGKW79P

chrisnc added a commit to chrisnc/llvm-project that referenced this issue Oct 7, 2024
…sed.

Currently, compiling for eabihf with a CPU lacking floating-point
registers will silently use the soft-float ABI instead, even though the
Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which
leads to silent ABI mismatches at link time.

Fixes llvm#110383.
chrisnc added a commit to chrisnc/llvm-project that referenced this issue Oct 7, 2024
…sed.

Currently, compiling for eabihf with a CPU lacking floating-point
registers will silently use the soft-float ABI instead, even though the
Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which
leads to silent ABI mismatches at link time.

Fixes llvm#110383.
@llvmbot
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llvmbot commented Oct 7, 2024

@llvm/issue-subscribers-backend-arm

Author: Chris Copeland (chrisnc)

In GCC, this is treated as an error, because the chosen CPU cannot implement the ABI that has been requested.

https://godbolt.org/z/89YGKW79P

@RalfJung
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RalfJung commented Oct 7, 2024 via email

@chrisnc chrisnc changed the title [ARM] clang silently switches to the soft-float ABI if an FPU-less CPU is specified for a hard-float target [ARM] clang/LLVM silently switches to the soft-float ABI if an FPU-less CPU is specified for a hard-float target Oct 7, 2024
@RalfJung
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RalfJung commented Oct 7, 2024

A similar issue exists with target features: if I pass -fpregs to createTargetMachine, it will silently change the ABI. I would expect an error saying that the registers are missing for this ABI. If I pass +soft-float,-fpregs, then everything is fine as I explicitly asked for the ABI change.

@chrisnc
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chrisnc commented Oct 7, 2024

@RalfJung I believe the PR I have linked to this issue #111334 will address that case as well (for Arm at least). If the hard-float ABI is used but the fpregs feature isn't present, it errors out. I'll confirm this later.

@RalfJung
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RalfJung commented Oct 8, 2024 via email

chrisnc added a commit to chrisnc/llvm-project that referenced this issue Nov 3, 2024
…sed.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes llvm#110383.
chrisnc added a commit to chrisnc/llvm-project that referenced this issue Nov 6, 2024
…sed.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes llvm#110383.
chrisnc added a commit to chrisnc/llvm-project that referenced this issue Nov 6, 2024
…sed.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes llvm#110383.
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