Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … #101449

Merged
merged 2 commits into from
Aug 14, 2024

Conversation

BeMg
Copy link
Contributor

@BeMg BeMg commented Aug 1, 2024

…ImplID

This patch

  1. remove the vendorId from __riscv_vendor_feature_bits
  2. Define a new structure for vendorID, ArchID and ImplID
  3. Update the relate init code

@BeMg BeMg requested a review from kito-cheng August 1, 2024 09:40
@asb
Copy link
Contributor

asb commented Aug 1, 2024

Alongside #101472, this seems to be extending the interface beyond what is described in the current draft spec. Is there some other source of truth I should be looking for? Is this a proposal to change the spec, or an implementation of something that was already decided (at least tentatively)?

@BeMg
Copy link
Contributor Author

BeMg commented Aug 1, 2024

Alongside #101472, this seems to be extending the interface beyond what is described in the current draft spec. Is there some other source of truth I should be looking for? Is this a proposal to change the spec, or an implementation of something that was already decided (at least tentatively)?

I will soon update these changes in riscv-non-isa/riscv-c-api-doc#74. These changes are based on discussions with @kito-cheng and @preames.

Copy link
Member

@kito-cheng kito-cheng left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM, and I believe this modification will allow us to quickly extend the cpu= or tune= syntax in the future :)

Copy link
Collaborator

@topperc topperc left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM

@BeMg BeMg merged commit 8bf298f into llvm:main Aug 14, 2024
7 checks passed
bwendling pushed a commit to bwendling/llvm-project that referenced this pull request Aug 15, 2024
llvm#101449)

…ImplID

This patch 

1. remove the vendorId from `__riscv_vendor_feature_bits`
2. Define a new structure for vendorID, ArchID and ImplID
3. Update the relate init code
wangpc-pp added a commit that referenced this pull request Nov 22, 2024
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.

We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.

This depends on #116202.

Reviewers: lenary, BeMg, kito-cheng, preames, lukel97

Reviewed By: lenary

Pull Request: #116231
wangpc-pp added a commit that referenced this pull request Nov 22, 2024
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.

We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.

This depends on #116202.

Reviewers: lenary, BeMg, kito-cheng, preames, lukel97

Reviewed By: lenary

Pull Request: #116231
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants