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[RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … #101449
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Alongside #101472, this seems to be extending the interface beyond what is described in the current draft spec. Is there some other source of truth I should be looking for? Is this a proposal to change the spec, or an implementation of something that was already decided (at least tentatively)? |
I will soon update these changes in riscv-non-isa/riscv-c-api-doc#74. These changes are based on discussions with @kito-cheng and @preames. |
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LGTM, and I believe this modification will allow us to quickly extend the cpu=
or tune=
syntax in the future :)
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LGTM
llvm#101449) …ImplID This patch 1. remove the vendorId from `__riscv_vendor_feature_bits` 2. Define a new structure for vendorID, ArchID and ImplID 3. Update the relate init code
We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_is` via comparing values in compiler's CPU definitions and `__riscv_cpu_model`. This depends on #116202. Reviewers: lenary, BeMg, kito-cheng, preames, lukel97 Reviewed By: lenary Pull Request: #116231
We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_is` via comparing values in compiler's CPU definitions and `__riscv_cpu_model`. This depends on #116202. Reviewers: lenary, BeMg, kito-cheng, preames, lukel97 Reviewed By: lenary Pull Request: #116231
…ImplID
This patch
__riscv_vendor_feature_bits