Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Target] Construct SmallVector<MachineMemOperand *> with ArrayRef (NFC) #102779

Merged
merged 1 commit into from
Aug 11, 2024
Merged

[Target] Construct SmallVector<MachineMemOperand *> with ArrayRef (NFC) #102779

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 2 additions & 4 deletions llvm/lib/Target/VE/VEISelLowering.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2184,8 +2184,7 @@ VETargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
MachineFunction::iterator I = ++MBB->getIterator();

// Memory Reference.
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());
Register BufReg = MI.getOperand(1).getReg();

Register DstReg;
Expand Down Expand Up @@ -2311,8 +2310,7 @@ VETargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
MachineRegisterInfo &MRI = MF->getRegInfo();

// Memory Reference.
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());
Register BufReg = MI.getOperand(0).getReg();

Register Tmp = MRI.createVirtualRegister(&VE::I64RegClass);
Expand Down
12 changes: 4 additions & 8 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -35771,8 +35771,7 @@ void X86TargetLowering::emitSetJmpShadowStackFix(MachineInstr &MI,
MachineInstrBuilder MIB;

// Memory Reference.
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());

// Initialize a register with zero.
MVT PVT = getPointerTy(MF->getDataLayout());
Expand Down Expand Up @@ -35817,8 +35816,7 @@ X86TargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
MachineFunction::iterator I = ++MBB->getIterator();

// Memory Reference
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());

unsigned DstReg;
unsigned MemOpndSlot = 0;
Expand Down Expand Up @@ -35974,8 +35972,7 @@ X86TargetLowering::emitLongJmpShadowStackFix(MachineInstr &MI,
MachineRegisterInfo &MRI = MF->getRegInfo();

// Memory Reference
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());

MVT PVT = getPointerTy(MF->getDataLayout());
const TargetRegisterClass *PtrRC = getRegClassFor(PVT);
Expand Down Expand Up @@ -36164,8 +36161,7 @@ X86TargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
MachineRegisterInfo &MRI = MF->getRegInfo();

// Memory Reference
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands_begin(),
MI.memoperands_end());
SmallVector<MachineMemOperand *, 2> MMOs(MI.memoperands());

MVT PVT = getPointerTy(MF->getDataLayout());
assert((PVT == MVT::i64 || PVT == MVT::i32) &&
Expand Down
Loading