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[X86][CodeGen] Fix crash when commute operands of Instruction for code size #79245

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Jan 24, 2024
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35 changes: 14 additions & 21 deletions llvm/lib/Target/X86/X86InstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2326,33 +2326,26 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
case X86::VBLENDPSrri:
// If we're optimizing for size, try to use MOVSD/MOVSS.
if (MI.getParent()->getParent()->getFunction().hasOptSize()) {
unsigned Mask;
switch (Opc) {
default:
llvm_unreachable("Unreachable!");
case X86::BLENDPDrri:
Opc = X86::MOVSDrr;
Mask = 0x03;
break;
case X86::BLENDPSrri:
Opc = X86::MOVSSrr;
Mask = 0x0F;
break;
case X86::VBLENDPDrri:
Opc = X86::VMOVSDrr;
Mask = 0x03;
break;
case X86::VBLENDPSrri:
Opc = X86::VMOVSSrr;
Mask = 0x0F;
break;
}
unsigned Mask = (Opc == X86::BLENDPDrri || Opc == X86::VBLENDPDrri) ? 0x03: 0x0F;
if ((MI.getOperand(3).getImm() ^ Mask) == 1) {
#define FROM_TO(FROM, TO) \
case X86::FROM: \
Opc = X86::TO; \
break;
switch (Opc) {
default:
llvm_unreachable("Unreachable!");
FROM_TO(BLENDPDrri, MOVSDrr)
FROM_TO(BLENDPSrri, MOVSSrr)
FROM_TO(VBLENDPDrri, VMOVSDrr)
FROM_TO(VBLENDPSrri, VMOVSSrr)
}
WorkingMI = CloneIfNew(MI);
WorkingMI->setDesc(get(Opc));
WorkingMI->removeOperand(3);
break;
}
#undef FROM_TO
}
[[fallthrough]];
case X86::PBLENDWrri:
Expand Down
9 changes: 9 additions & 0 deletions llvm/test/CodeGen/X86/commute-blend-avx2.ll
Original file line number Diff line number Diff line change
Expand Up @@ -88,3 +88,12 @@ define <4 x double> @commute_fold_vblendpd_256(<4 x double> %a, ptr %b) #0 {
ret <4 x double> %2
}
declare <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone

define <4 x float> @commute_vblendpd_128_for_code_size(<4 x float> %a, <4 x float> %b) optsize {
; CHECK-LABEL: commute_vblendpd_128_for_code_size:
; CHECK: # %bb.0:
; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
; CHECK-NEXT: retq
%r = shufflevector <4 x float> %b, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
ret <4 x float> %r
}
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