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[AMDGPU] Do not bother adding reserved registers to liveins #79436

Merged
merged 2 commits into from
Jan 25, 2024
Merged

[AMDGPU] Do not bother adding reserved registers to liveins #79436

merged 2 commits into from
Jan 25, 2024

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jayfoad
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@jayfoad jayfoad commented Jan 25, 2024

Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.

Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
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llvmbot commented Jan 25, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Jay Foad (jayfoad)

Changes

Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.


Full diff: https://github.com/llvm/llvm-project/pull/79436.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (+1-3)
  • (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1-2)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index e98ede88a7e2db9..753c2f70f63fe4b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -6890,11 +6890,9 @@ bool AMDGPULegalizerInfo::legalizeWaveID(MachineInstr &MI,
     return false;
   LLT S32 = LLT::scalar(32);
   Register DstReg = MI.getOperand(0).getReg();
-  Register TTMP8 =
-      getFunctionLiveInPhysReg(B.getMF(), B.getTII(), AMDGPU::TTMP8,
-                               AMDGPU::SReg_32RegClass, B.getDebugLoc(), S32);
   auto LSB = B.buildConstant(S32, 25);
   auto Width = B.buildConstant(S32, 5);
+  auto TTMP8 = B.buildCopy(S32, Register(AMDGPU::TTMP8));
   B.buildUbfx(DstReg, TTMP8, LSB, Width);
   MI.eraseFromParent();
   return true;
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 4cf9cafedf28fea..ae0f0605a4a338a 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -7927,8 +7927,7 @@ SDValue SITargetLowering::lowerWaveID(SelectionDAG &DAG, SDValue Op) const {
     return {};
   SDLoc SL(Op);
   MVT VT = MVT::i32;
-  SDValue TTMP8 = CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass,
-                                       AMDGPU::TTMP8, VT, SL);
+  SDValue TTMP8 = DAG.getCopyFromReg(DAG.getEntryNode(), SL, AMDGPU::TTMP8, VT);
   return DAG.getNode(AMDGPUISD::BFE_U32, SL, VT, TTMP8,
                      DAG.getConstant(25, SL, VT), DAG.getConstant(5, SL, VT));
 }

auto LSB = B.buildConstant(S32, 25);
auto Width = B.buildConstant(S32, 5);
auto TTMP8 = B.buildCopy(S32, Register(AMDGPU::TTMP8));
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This will build the copy here instead of in the entry block, and will create a new one for each use of the intrinsic. Is that OK?

@jayfoad jayfoad merged commit 66c710e into llvm:main Jan 25, 2024
3 of 4 checks passed
@jayfoad jayfoad deleted the wave-id-liveins branch January 25, 2024 15:17
jayfoad added a commit to jayfoad/llvm-project that referenced this pull request Jan 29, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
tstellar pushed a commit that referenced this pull request Jan 29, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
tstellar pushed a commit to tstellar/llvm-project that referenced this pull request Feb 14, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
tstellar pushed a commit to tstellar/llvm-project that referenced this pull request Feb 14, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
tstellar pushed a commit to tstellar/llvm-project that referenced this pull request Feb 14, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
tstellar pushed a commit to tstellar/llvm-project that referenced this pull request Feb 14, 2024
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the
function liveins.
@pointhex pointhex mentioned this pull request May 7, 2024
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3 participants