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MAME 0.114
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mamedev committed Apr 2, 2007
1 parent 2eef32c commit 31acddd
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Showing 623 changed files with 5,714 additions and 4,011 deletions.
2 changes: 1 addition & 1 deletion makefile
Original file line number Diff line number Diff line change
Expand Up @@ -201,7 +201,7 @@ SRC = src
# compile-time definitions
#-------------------------------------------------

DEFS = -DX86_ASM -DLSB_FIRST -DINLINE="static __inline__" -Dasm=__asm__ -DCRLF=3
DEFS = -DLSB_FIRST -DINLINE="static __inline__" -DCRLF=3

ifdef PTR64
DEFS += -DPTR64
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7 changes: 7 additions & 0 deletions src/emu/cpu/arm/arm.c
Original file line number Diff line number Diff line change
Expand Up @@ -293,6 +293,8 @@ INLINE UINT32 GetRegister( int rIndex )
INLINE void SetRegister( int rIndex, UINT32 value )
{
arm.sArmRegister[sRegisterTable[MODE][rIndex]] = value;
if (rIndex == eR15)
change_pc(value & ADDRESS_MASK);
}

/***************************************************************************/
Expand All @@ -305,6 +307,7 @@ static void arm_reset(void)

/* start up in SVC mode with interrupts disabled. */
R15 = eARM_MODE_SVC|I_MASK|F_MASK;
change_pc(R15 & ADDRESS_MASK);
}

static void arm_exit(void)
Expand Down Expand Up @@ -408,6 +411,7 @@ static int arm_execute( int cycles )
R15 = eARM_MODE_SVC; /* Set SVC mode so PC is saved to correct R14 bank */
SetRegister( 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK);
change_pc(pc&ADDRESS_MASK);
arm_icount -= 2 * S_CYCLE + N_CYCLE;
}
else /* Undefined */
Expand Down Expand Up @@ -537,6 +541,7 @@ static void HandleBranch( UINT32 insn )
{
R15 += off + 8;
}
change_pc(R15 & ADDRESS_MASK);
arm_icount -= 2 * S_CYCLE + N_CYCLE;
}

Expand Down Expand Up @@ -612,6 +617,7 @@ static void HandleMemSingle( UINT32 insn )
if (rd == eR15)
{
R15 = (READ32(rnv) & ADDRESS_MASK) | (R15 & PSR_MASK) | (R15 & MODE_MASK);
change_pc(R15 & ADDRESS_MASK);

/*
The docs are explicit in that the bottom bits should be masked off
Expand Down Expand Up @@ -844,6 +850,7 @@ static void HandleALU( UINT32 insn )
{
/* Merge the old NZCV flags into the new PC value */
R15 = (rd & ADDRESS_MASK) | (R15 & PSR_MASK) | (R15 & IRQ_MASK) | (R15&MODE_MASK);
change_pc(R15 & ADDRESS_MASK);
arm_icount -= S_CYCLE + N_CYCLE;
}
else
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2 changes: 1 addition & 1 deletion src/emu/cpu/cop400/cop410.c
Original file line number Diff line number Diff line change
Expand Up @@ -310,7 +310,7 @@ void cop410_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 9; break;
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 4; break;
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
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