Remove the last ConfigEntry state (#1902)

* Get rid of `ConfigEntry::ExternalBIOSEnable`

- Now the BIOS files themselves are checked
- The frontend's `Config::ExternalBIOSEnable` is not affected

* Add `JITArgs`

* Pass the JIT status to the `ARM` constructors

* Encapsulate `NDS::EnableJIT`

* Pass `JITArgs` to `ARMJIT`'s constructor

* Remove the `JIT_*` `ConfigEntry`s in favor of members

- Allow all the JIT args to be set with `NDS::SetJITArgs`
- Encapsulate the JIT-related parameters in `ARMJIT` so they can reset the block cache if changed
- Update the active (or newly-created) console in the frontend with adjusted JIT args

* Make audio bit depth and interpolation configurable in `NDSArgs`

- Define enums for both
- Give those settings default values in `NDSArgs`
- Remove `ConfigEntry::AudioBitDepth`
- Initialize these settings in the relevant SPU constructors

* Move the last DSi-specific logic in `Reset` to its own subclass

* Remove `ConfigEntry::DSi_FullBIOSBoot`

- Add members to `DSi` instead for getting and setting this
- Update the frontend to accommodate these changes

* Oops, missed a spot

* Remove `ConfigEntry::Firm_MAC` and `Platform::GetConfigArray`

- Also move the MAC parsing code to `ROMManager`

* Remove the last `ConfigEntry` state

- Make GDB support configurable via members

* Add some `#ifdef`s that I'd almost forgotten

src/ARM.cpp

@@ -106,17 +106,17 @@ const u32 ARM::ConditionTable[16] =
     0x0000  // NE
 };
 
-ARM::ARM(u32 num, melonDS::NDS& nds) :
+ARM::ARM(u32 num, bool jit, std::optional<GDBArgs> gdb, melonDS::NDS& nds) :
 #ifdef GDBSTUB_ENABLED
-    GdbStub(this, Platform::GetConfigInt(num ? Platform::GdbPortARM7 : Platform::GdbPortARM9)),
+    GdbStub(this, gdb ? (num ? gdb->PortARM7 : gdb->PortARM9) : 0),
 #endif
     Num(num), // well uh
     NDS(nds)
 {
 #ifdef GDBSTUB_ENABLED
-    if (Platform::GetConfigBool(Platform::GdbEnabled)
+    if (gdb
 #ifdef JIT_ENABLED
-            && !Platform::GetConfigBool(Platform::JIT_Enable)
+            && !jit // TODO: Should we support toggling the GdbStub without destroying the ARM?
 #endif
     )
         GdbStub.Init();
@@ -129,14 +129,14 @@ ARM::~ARM()
     // dorp
 }
 
-ARMv5::ARMv5(melonDS::NDS& nds) : ARM(0, nds)
+ARMv5::ARMv5(melonDS::NDS& nds, std::optional<GDBArgs> gdb, bool jit) : ARM(0, jit, gdb, nds)
 {
     DTCM = NDS.JIT.Memory.GetARM9DTCM();
 
     PU_Map = PU_PrivMap;
 }
 
-ARMv4::ARMv4(melonDS::NDS& nds) : ARM(1, nds)
+ARMv4::ARMv4(melonDS::NDS& nds, std::optional<GDBArgs> gdb, bool jit) : ARM(1, jit, gdb, nds)
 {
     //
 }
@@ -187,8 +187,6 @@ void ARM::Reset()
 #ifdef GDBSTUB_ENABLED
     IsSingleStep = false;
     BreakReq = false;
-    BreakOnStartup = Platform::GetConfigBool(
-        Num ? Platform::GdbARM7BreakOnStartup : Platform::GdbARM9BreakOnStartup);
 #endif
 
     // zorp
@@ -224,7 +222,7 @@ void ARM::DoSavestate(Savestate* file)
     file->VarArray(R_UND, 3*sizeof(u32));
     file->Var32(&CurInstr);
 #ifdef JIT_ENABLED
-    if (file->Saving && NDS.EnableJIT)
+    if (file->Saving && NDS.IsJITEnabled())
     {
         // hack, the JIT doesn't really pipeline
         // but we still want JIT save states to be

src/ARM.h

@@ -20,6 +20,7 @@
 #define ARM_H
 
 #include <algorithm>
+#include <optional>
 
 #include "types.h"
 #include "MemRegion.h"
@@ -44,7 +45,7 @@ enum
 const u32 ITCMPhysicalSize = 0x8000;
 const u32 DTCMPhysicalSize = 0x4000;
 
-
+struct GDBArgs;
 class ARMJIT;
 class GPU;
 class ARMJIT_Memory;
@@ -57,7 +58,7 @@ class ARM
 #endif
 {
 public:
-    ARM(u32 num, NDS& nds);
+    ARM(u32 num, bool jit, std::optional<GDBArgs> gdb, NDS& nds);
     virtual ~ARM(); // destroy shit
 
     virtual void Reset();
@@ -202,6 +203,7 @@ class ARM
     bool IsSingleStep;
     bool BreakReq;
     bool BreakOnStartup;
+    u16 Port;
 
 public:
     int GetCPU() const override { return Num ? 7 : 9; }
@@ -225,7 +227,7 @@ class ARM
 class ARMv5 : public ARM
 {
 public:
-    ARMv5(melonDS::NDS& nds);
+    ARMv5(melonDS::NDS& nds, std::optional<GDBArgs> gdb, bool jit);
     ~ARMv5();
 
     void Reset() override;
@@ -377,7 +379,7 @@ class ARMv5 : public ARM
 class ARMv4 : public ARM
 {
 public:
-    ARMv4(melonDS::NDS& nds);
+    ARMv4(melonDS::NDS& nds, std::optional<GDBArgs> gdb, bool jit);
 
     void FillPipeline() override;
 

src/ARMJIT.cpp

@@ -237,16 +237,6 @@ ARMJIT::~ARMJIT() noexcept
 
 void ARMJIT::Reset() noexcept
 {
-    MaxBlockSize = Platform::GetConfigInt(Platform::JIT_MaxBlockSize);
-    LiteralOptimizations = Platform::GetConfigBool(Platform::JIT_LiteralOptimizations);
-    BranchOptimizations = Platform::GetConfigBool(Platform::JIT_BranchOptimizations);
-    FastMemory = Platform::GetConfigBool(Platform::JIT_FastMemory);
-
-    if (MaxBlockSize < 1)
-        MaxBlockSize = 1;
-    if (MaxBlockSize > 32)
-        MaxBlockSize = 32;
-
     JitEnableWrite();
     ResetBlockCache();
 
@@ -491,6 +481,56 @@ void ARMJIT::RetireJitBlock(JitBlock* block) noexcept
     }
 }
 
+void ARMJIT::SetJITArgs(JITArgs args) noexcept
+{
+    args.MaxBlockSize = std::clamp(args.MaxBlockSize, 1u, 32u);
+
+    if (MaxBlockSize != args.MaxBlockSize
+        || LiteralOptimizations != args.LiteralOptimizations
+        || BranchOptimizations != args.BranchOptimizations
+        || FastMemory != args.FastMemory)
+        ResetBlockCache();
+
+    MaxBlockSize = args.MaxBlockSize;
+    LiteralOptimizations = args.LiteralOptimizations;
+    BranchOptimizations = args.BranchOptimizations;
+    FastMemory = args.FastMemory;
+}
+
+void ARMJIT::SetMaxBlockSize(int size) noexcept
+{
+    size = std::clamp(size, 1, 32);
+
+    if (size != MaxBlockSize)
+        ResetBlockCache();
+
+    MaxBlockSize = size;
+}
+
+void ARMJIT::SetLiteralOptimizations(bool enabled) noexcept
+{
+    if (LiteralOptimizations != enabled)
+        ResetBlockCache();
+
+    LiteralOptimizations = enabled;
+}
+
+void ARMJIT::SetBranchOptimizations(bool enabled) noexcept
+{
+    if (BranchOptimizations != enabled)
+        ResetBlockCache();
+
+    BranchOptimizations = enabled;
+}
+
+void ARMJIT::SetFastMemory(bool enabled) noexcept
+{
+    if (FastMemory != enabled)
+        ResetBlockCache();
+
+    FastMemory = enabled;
+}
+
 void ARMJIT::CompileBlock(ARM* cpu) noexcept
 {
     bool thumb = cpu->CPSR & 0x20;

src/ARMJIT.h

@@ -19,6 +19,8 @@
 #ifndef ARMJIT_H
 #define ARMJIT_H
 
+#include <algorithm>
+#include <optional>
 #include <memory>
 #include "types.h"
 
@@ -30,6 +32,7 @@
 #endif
 
 #include "ARMJIT_Compiler.h"
+#include "Args.h"
 #include "MemConstants.h"
 
 namespace melonDS
@@ -40,7 +43,15 @@ class JitBlock;
 class ARMJIT
 {
 public:
-    ARMJIT(melonDS::NDS& nds) noexcept : NDS(nds), Memory(nds), JITCompiler(nds) {};
+    ARMJIT(melonDS::NDS& nds, std::optional<JITArgs> jit) noexcept :
+        NDS(nds),
+        Memory(nds),
+        JITCompiler(nds),
+        MaxBlockSize(jit.has_value() ? std::clamp(jit->MaxBlockSize, 1u, 32u) : 32),
+        LiteralOptimizations(jit.has_value() ? jit->LiteralOptimizations : false),
+        BranchOptimizations(jit.has_value() ? jit->BranchOptimizations : false),
+        FastMemory(jit.has_value() ? jit->FastMemory : false)
+    {}
     ~ARMJIT() noexcept NOOP_IF_NO_JIT;
     void InvalidateByAddr(u32) noexcept NOOP_IF_NO_JIT;
     void CheckAndInvalidateWVRAM(int) noexcept NOOP_IF_NO_JIT;
@@ -68,17 +79,29 @@ class ARMJIT
 #endif
 
     ARMJIT_Memory Memory;
+private:
     int MaxBlockSize {};
     bool LiteralOptimizations = false;
     bool BranchOptimizations = false;
     bool FastMemory = false;
-
+public:
     melonDS::NDS& NDS;
     TinyVector<u32> InvalidLiterals {};
     friend class ARMJIT_Memory;
     void blockSanityCheck(u32 num, u32 blockAddr, JitBlockEntry entry) noexcept;
     void RetireJitBlock(JitBlock* block) noexcept;
 
+    int GetMaxBlockSize() const noexcept { return MaxBlockSize; }
+    bool LiteralOptimizationsEnabled() const noexcept { return LiteralOptimizations; }
+    bool BranchOptimizationsEnabled() const noexcept { return BranchOptimizations; }
+    bool FastMemoryEnabled() const noexcept { return FastMemory; }
+
+    void SetJITArgs(JITArgs args) noexcept;
+    void SetMaxBlockSize(int size) noexcept;
+    void SetLiteralOptimizations(bool enabled) noexcept;
+    void SetBranchOptimizations(bool enabled) noexcept;
+    void SetFastMemory(bool enabled) noexcept;
+
     Compiler JITCompiler;
     std::unordered_map<u32, JitBlock*> JitBlocks9 {};
     std::unordered_map<u32, JitBlock*> JitBlocks7 {};

src/ARMJIT_A64/ARMJIT_LoadStore.cpp

@@ -112,7 +112,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
     if (size == 16)
         addressMask = ~1;
 
-    if (NDS.JIT.LiteralOptimizations && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
+    if (NDS.JIT.LiteralOptimizationsEnabled() && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
     {
         u32 addr = R15 + offset.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
 
@@ -147,7 +147,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
         MOV(W0, rnMapped);
     }
 
-    bool addrIsStatic = NDS.JIT.LiteralOptimizations
+    bool addrIsStatic = NDS.JIT.LiteralOptimizationsEnabled()
         && RegCache.IsLiteral(rn) && offset.IsImm && !(flags & (memop_Writeback|memop_Post));
     u32 staticAddress;
     if (addrIsStatic)
@@ -189,7 +189,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
         ? NDS.JIT.Memory.ClassifyAddress9(addrIsStatic ? staticAddress : CurInstr.DataRegion)
         : NDS.JIT.Memory.ClassifyAddress7(addrIsStatic ? staticAddress : CurInstr.DataRegion);
 
-    if (NDS.JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
+    if (NDS.JIT.FastMemoryEnabled() && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
     {
         ptrdiff_t memopStart = GetCodeOffset();
         LoadStorePatch patch;
@@ -453,7 +453,7 @@ void Compiler::T_Comp_LoadPCRel()
     u32 offset = ((CurInstr.Instr & 0xFF) << 2);
     u32 addr = (R15 & ~0x2) + offset;
 
-    if (!NDS.JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
+    if (!NDS.JIT.LiteralOptimizationsEnabled() || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
         Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
 }
 
@@ -498,7 +498,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         ? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
         : NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
 
-    bool compileFastPath = NDS.JIT.FastMemory
+    bool compileFastPath = NDS.JIT.FastMemoryEnabled()
         && store && !usermode && (CurInstr.Cond() < 0xE || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget));
 
     {

src/ARMJIT_x64/ARMJIT_LoadStore.cpp

@@ -119,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
     if (size == 16)
         addressMask = ~1;
 
-    if (NDS.JIT.LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
+    if (NDS.JIT.LiteralOptimizationsEnabled() && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
     {
         u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
 
@@ -136,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         Comp_AddCycles_CDI();
     }
 
-    bool addrIsStatic = NDS.JIT.LiteralOptimizations
+    bool addrIsStatic = NDS.JIT.LiteralOptimizationsEnabled()
         && RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
     u32 staticAddress;
     if (addrIsStatic)
@@ -200,7 +200,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         ? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
         : NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
 
-    if (NDS.JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
+    if (NDS.JIT.FastMemoryEnabled() && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
     {
         if (rdMapped.IsImm())
         {
@@ -431,7 +431,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
     else
         Comp_AddCycles_CD();
 
-    bool compileFastPath = NDS.JIT.FastMemory
+    bool compileFastPath = NDS.JIT.FastMemoryEnabled()
         && !usermode && (CurInstr.Cond() < 0xE || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget));
 
     // we need to make sure that the stack stays aligned to 16 bytes
@@ -809,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
 {
     u32 offset = (CurInstr.Instr & 0xFF) << 2;
     u32 addr = (R15 & ~0x2) + offset;
-    if (!NDS.JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
+    if (!NDS.JIT.LiteralOptimizationsEnabled() || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
         Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
 }