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HLS sobel filter implementation using Xilinx Vitis Video Library

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millertheripper/hls_sobel_axi_stream

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HLS Sobel Filter based on Xilinx Vitis Video Library (L1) using AXI-Stream interfaces

  • 24 Bit AXI-Stream width (Can be modified easy)
  • Uses Vitis Layer 1 (L1) for integration into Vivado Block Design

Before After

Requirements

How to Compile

  • Setup environment paths in Makefile
  • Setup part number and clkp in run_hls.tcl
  • Check simulation output image "output_csim.png"
  • IP core is generated under export/

Known Issues

  • Due to a Vitis 2020.2 bug cosim is not working (use csim instead)

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HLS sobel filter implementation using Xilinx Vitis Video Library

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