Enable D-Cache for Cortex-M7

Related to #485

Enable D-Cache for Cortex-M7 devices.

* Enable the D-Cache in `src/modm/platform/core/cortex/startup.c.in` by adding `SCB_EnableDCache()` after `SCB_EnableICache()`.
* Add a comment explaining the D-Cache enablement and the need for manual invalidation on certain operations.
* Update the documentation in `docs/src/reference/build-systems.md` to reflect the D-Cache enablement for Cortex-M7 devices.
* Add a note in the documentation about the need for manual invalidation on certain operations.

Signed-off-by: Vishwanath Martur <64204611+vishwamartur@users.noreply.github.com>

docs/src/reference/build-systems.md

@@ -87,3 +87,8 @@ This can be significantly easier than manually editing the generated build
 scripts, and is also persistent across library regeneration.
 Please see the [`modm:build` documentation](../module/modm-build/#collectors)
 for the available collectors and their inputs.
+
+## Cortex-M7 D-Cache Enablement
+
+For Cortex-M7 devices, the D-Cache is now enabled by default with a write-through policy. This change improves performance by caching data reads and writes. However, it is important to note that manual invalidation of the D-Cache is required on certain operations, such as writing to Flash. Users can still enable the write-back policy in `main()` if required.
+

src/modm/platform/core/cortex/startup.c.in

@@ -100,6 +100,8 @@ void __modm_startup(void)
 %% if "m7" in core
 	// Enable instruction cache
 	SCB_EnableICache();
+	// Enable data cache with write-through policy
+	SCB_EnableDCache();
 %% endif
 
 %% if core != "cortex-m0"