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Connections between the STM32 and the iCE40
The BlackIce board has a pretty powerful STM32 microcontroller. By default, it's used to program the FPGA bitstream and then just sit idle, but it can be used for any kind of application that needs a processor and some custom hardware.
So if we want to use it for that, we need to know which options are available to exchange data between the STM32 and the FPGA.
In the table below, the STM32 Pin column contains the name that is assigned to the pin in the BlackIce schematic. The iCE40 Name column contains the name
that has been assigned in the examples/common/blackice-ii.pcf
file of the BlackIce-II GitHub repo. This way, you can use the
pin name straight in your Verilog design.
Schematic Signal | STM32 Pin | iCE40 Name | Special Board Function | Comments |
---|---|---|---|---|
SS# | PA15 | PMOD[52] | SPI FPGA bitstream download | At bootup, configured as SPI slave by FPGA. After that, usable as GPIO between STM32 and FPGA. |
SCK | PB3 | PMOD[53] | SPI FPGA bitstream download | At bootup, configured as SPI slave by FPGA. After that, usable as GPIO between STM32 and FPGA. |
MISO | PB4 | PMOD[54] | SPI FPGA bitstream download | At bootup, configured as SPI slave by FPGA. After that, usable as GPIO between STM32 and FPGA. |
MOSI | PB5 | PMOD[55] | SPI FPGA bitstream download | At bootup, configured as SPI slave by FPGA. After that, usable as GPIO between STM32 and FPGA. |
QCS# | PA2 | QSPICSN | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
QCK | PA3 | QSPICK | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
QD0 | PB1 | QSPIDQ[0] | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
QD1 | PB0 | QSPIDQ[1] | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
QD2 | PA7 | QSPIDQ[2] | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
QD3 | PA6 | QSPIDQ[3] | High-speed QUAD SPI interface | Usable as GPIO, or as QUADSPI slave. |
RX | PA10 | PMOD[2] | UART RX | Driven by the CH340 with serial data received from USB2. |
TX | PA10 | PMOD[3] | UART TX | At bootup, driven by the STM32. After that, it's usable as a GPIO between STM32 and FPGA. |
DIG16 | PD2 | PMOD[51] | Switch SW2.1, SDCard | Make sure switch is open when using as GPIO or SDCard to avoid short circuit! |
DIG17 | PC10 | PMOD[50] | Switch SW2.2, SDCard | Make sure switch is open when using as GPIO or SDCard to avoid short circuit! |
DIG18 | PC11 | PMOD[49] | Switch SW1.2, SDCard | Make sure switch is open when using as GPIO or SDCard to avoid short circuit! |
DIG19 | PC12 | PMOD[48] | Switch SW1.1, SDCard | Make sure switch is open when using as GPIO or SDCard to avoid short circuit! |
B1 | PC8 | B1 | Button S3, SDCard | Don't press button open when using as GPIO or SDCard to avoid short circuit! |
B2 | PC9 | B2 | Button S4, SDCard | Don't press button open when using as GPIO or SDCard to avoid short circuit! |
DBG1 | PC13-TAMPER-RTC | DBG1 | ||
DONE | PB7 | DONE | ||
RESET | PB6 | <CRESET_B> | iCE40 global reset | This pin is used by the STM32 to completely reset the iCE40. It cannot be used for anything else. |
For lower data rates, the most obvious solution is to use an SPI interface on the same IO pins that are used to load the bitstream. This also has the additional advantage that you can reuse major parts of the iceboot
firmware.
For very high data rates, the quad SPI pins are the best option.