README.md

Open ASIC World

The purpose of this repository is to try and collect all the open source tools related to the Design of Digital ASICs.

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Open-Source Text Editors

• VIM
• nano
• GNU Emacs

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Open-Source Hardware Description Language (HDL)

• Verilog
• Chisel
• amaranth : A modern hardware definition language and toolchain based on Python
• SpinalHDL

Open-Source High-level Synthesis (HLS)

• XLS : implements a High Level Synthesis toolchain that produces synthesizable designs (Verilog and SystemVerilog) from flexible, high-level descriptions of functionality.
• PipelineC : A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

Open-Source Simulators

• Intel QuestaSim
• Icarus Verilog
• Verilator
• GHDL : a simulator for the VHDL language.
• NVC : a VHDL compiler and simulator.
• OpenVAF : Verilog-A compiler that empowers the open source silicon revolution.

Open-Source Wave Viewer

• GTKWave
• WaveDrom : draws a Timing Diagram or Waveform from simple textual description.
• Surfer : An Extensible and Snappy Waveform Viewer

Open-Source Frameworks

• CHIPYARD
• SiliconCompiler : A modular build system for hardware
• edalize : Edalize is a Python Library for interacting with EDA tools. It can create project files for supported tools and run them in batch or GUI mode (where supported).

Open-Source Complete Toolchain for VLSI

• ALLIANCE/CORIOLIS
  • ALLIANCE Github repository
  • CORIOLIS

Open-Source Production Design Kits

• SkyWater SKY130nm PDK
• GlobalFoundries 0.18UM PDK
• open_pdks : PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.

Open-Source Predictive Design Kits

• NCSU FreePDK45nm
• NCSU FreePDK15nm
• ASAP7nm
  • Files
• vlsiffra : Create fast and efficient standard cell based adders, multipliers and multiply-adders.

Open-Source Standard-Cell Library

• NanGate FreePDK45nm
• OSU FreePDK45nm
• NanGate Open-Cell 15nm

Open-Source SRAM Compilers

• OpenRAM: an open-source static random access memory (SRAM) compiler.
  • Website
  • Github repository

Open-Source Synthesis tool

• Yosys : a framework for Verilog RTL synthesis.

Open-Source Static Timming Analysis (STA)

• OpenTimer
• OpenSTA

Open-Source Place&Route tool

• nextpnr
• [CUGR](An Extensible and Snappy Waveform Viewer) : VLSI Global Routing Tool Developed by CUHK
• LibreEDA : a framework for the physical design of silicon chips and tries to simplify the development of place and route tools.

Open-Source GDS generation

• gdsfactory : python library to design chips

Open-Source Layout Viewer

• Magic VLSI Layout Tool
• KLayout : a GDS and OASIS file viewer.

Open-Source Design For Test (DFT)

• Fault : A complete open-source design-for-testing (DFT) Solution.

Open-Source Schematic capture

• XSCHEM : a schematic capture program.
• Xic : is a full-featured physical layout editor, schematic editor, and analysis tool.
• XCircuit : Schematic capture for SPICE netlists and PostScript

Open-Source Spice Simulator

• NGSPICE : source spice simulator for electric and electronic circuits.
• WRspice Circuit Simulator : a powerful and flexible circuit simulation and analysis tool.
• ahkab : a SPICE-like electronic circuit simulator written in Python