Revise state machine code gen

nasa · Aug 12, 2024 · e076bd8 · e076bd8
1 parent 454f33e
commit e076bd8
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Showing 5 changed files with 58 additions and 41 deletions.
diff --git a/compiler/lib/src/main/scala/analysis/Semantics/Component.scala b/compiler/lib/src/main/scala/analysis/Semantics/Component.scala
@@ -132,7 +132,7 @@ case class Component(
   /** Add a port instance to the port map */
   private def updateStateMachineInstanceMap(instance: StateMachineInstance):
   Result.Result[Component] = {
-    val name = instance.getUnqualifiedName
+    val name = instance.getName
     stateMachineInstanceMap.get(name) match {
       case Some(prevInstance) =>
         val loc = instance.getLoc

diff --git a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala
@@ -16,8 +16,8 @@ final case class StateMachineInstance(
 
   def getNodeId = aNode._2.id
 
-  /** Gets the unqualified name of the state machine instance */
-  def getUnqualifiedName = aNode._2.data.name
+  /** Gets the name of the state machine instance */
+  def getName = aNode._2.data.name
 
 }
 

diff --git a/...ler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala b/...ler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala
@@ -111,7 +111,8 @@ abstract class ComponentCppWriterUtils(
   val serialOutputPorts: List[PortInstance.General] = filterSerialPorts(outputPorts)
 
   /** List of state machine instances */
-  val stateMachineInstances: List[StateMachineInstance] = component.stateMachineInstanceMap.toList.map((_, sm) => sm)
+  val stateMachineInstances: List[StateMachineInstance] =
+    component.stateMachineInstanceMap.toList.map((_, sm) => sm).sortBy(_.getName)
 
   /** List of internal port instances sorted by name */
   val internalPorts: List[PortInstance.Internal] = component.portMap.toList.map((_, p) => p match {

diff --git a/...iler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala b/...iler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala
@@ -23,17 +23,6 @@ case class ComponentStateMachines(
   }
 
   def getFunctionMembers: List[CppDoc.Class.Member] = {    
-    val writeMessages = stateMachineInstances.flatMap{sm =>
-          lines(
-            s"""|
-                |case STATE_MACHINE_${sm.getUnqualifiedName.toUpperCase}: {
-            """
-          ) ++
-          writeSendMessageLogic("msg", sm.queueFull, sm.priority).map(indentIn) ++
-          List(Line("break;")).map(indentIn) ++
-          List(Line("}"))
-    }
-
     val serializeCode = 
           lines(
             s"""|ComponentIpcSerializableBuffer msg;
@@ -60,6 +49,37 @@ case class ComponentStateMachines(
                 |);"""
           )
 
+
+    val switchCode = List.concat(
+      lines("const U32 smId = ev.getsmId();"),
+      wrapInSwitch(
+        "smId",
+        List.concat(
+          stateMachineInstances.flatMap(
+            smi => {
+              Line.blank ::
+              wrapInScope(
+                s"case STATE_MACHINE_${smi.getName.toUpperCase}: {",
+                List.concat(
+                  writeSendMessageLogic("msg", smi.queueFull, smi.priority),
+                  lines("break;")
+                ),
+                "}"
+              )
+            }
+          ),
+          lines(
+            """|
+               |default:
+               |  FW_ASSERT(0, static_cast<FwAssertArgType>(smId));
+               |  break;
+               |"""
+          )
+
+        )
+      )
+    )
+
     val member = functionClassMember(
       Some(s"State machine base-class function for sendSignals"),
       "stateMachineInvoke",
@@ -72,10 +92,7 @@ case class ComponentStateMachines(
       ),
       CppDoc.Type("void"),
       Line.blank :: intersperseBlankLines(
-        List(
-          serializeCode,
-          wrapInSwitch("ev.getsmId()", writeMessages)
-        )
+        List(serializeCode, switchCode)
       )
     )
 

diff --git a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp
@@ -145,10 +145,22 @@ void ActiveStateMachinesComponentBase ::
     static_cast<FwAssertArgType>(_status)
   );
 
-  switch (ev.getsmId()) {
+  const U32 smId = ev.getsmId();
+  switch (smId) {
+
+    case STATE_MACHINE_SM1: {
+      // Send message
+      Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING;
+      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block);
+
+      FW_ASSERT(
+        qStatus == Os::Queue::QUEUE_OK,
+        static_cast<FwAssertArgType>(qStatus)
+      );
+      break;
+    }
 
     case STATE_MACHINE_SM2: {
-
       // Send message
       Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING;
       Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 2, _block);
@@ -161,7 +173,6 @@ void ActiveStateMachinesComponentBase ::
     }
 
     case STATE_MACHINE_SM3: {
-
       // Send message
       Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING;
       Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 3, _block);
@@ -178,11 +189,10 @@ void ActiveStateMachinesComponentBase ::
       break;
     }
 
-    case STATE_MACHINE_SM6: {
-
+    case STATE_MACHINE_SM4: {
       // Send message
       Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING;
-      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block);
+      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 4, _block);
 
       FW_ASSERT(
         qStatus == Os::Queue::QUEUE_OK,
@@ -192,7 +202,6 @@ void ActiveStateMachinesComponentBase ::
     }
 
     case STATE_MACHINE_SM5: {
-
       // Send message
       Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING;
       Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block);
@@ -204,11 +213,10 @@ void ActiveStateMachinesComponentBase ::
       break;
     }
 
-    case STATE_MACHINE_SM1: {
-
+    case STATE_MACHINE_SM6: {
       // Send message
-      Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING;
-      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block);
+      Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING;
+      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block);
 
       FW_ASSERT(
         qStatus == Os::Queue::QUEUE_OK,
@@ -217,18 +225,9 @@ void ActiveStateMachinesComponentBase ::
       break;
     }
 
-    case STATE_MACHINE_SM4: {
-
-      // Send message
-      Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING;
-      Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 4, _block);
-
-      FW_ASSERT(
-        qStatus == Os::Queue::QUEUE_OK,
-        static_cast<FwAssertArgType>(qStatus)
-      );
+    default:
+      FW_ASSERT(0, static_cast<FwAssertArgType>(smId));
       break;
-    }
   }
 }