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perf: Group basic block end opcodes to eliminate slower pattern matching #347

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302 changes: 153 additions & 149 deletions definitions/src/instructions.rs
Original file line number Diff line number Diff line change
Expand Up @@ -86,158 +86,159 @@ macro_rules! __for_each_inst_inner {
(ADDW, 0x14),
(AND, 0x15),
(ANDI, 0x16),
(AUIPC, 0x17),
(BEQ, 0x18),
(BGE, 0x19),
(BGEU, 0x1a),
(BLT, 0x1b),
(BLTU, 0x1c),
(BNE, 0x1d),
(DIV, 0x1e),
(DIVU, 0x1f),
(DIVUW, 0x20),
(DIVW, 0x21),
(EBREAK, 0x22),
(ECALL, 0x23),
(FENCE, 0x24),
(FENCEI, 0x25),
(JAL, 0x26),
(JALR_VERSION0, 0x27),
(JALR_VERSION1, 0x28),
(LB_VERSION0, 0x29),
(LB_VERSION1, 0x2a),
(LBU_VERSION0, 0x2b),
(LBU_VERSION1, 0x2c),
(LD_VERSION0, 0x2d),
(LD_VERSION1, 0x2e),
(LH_VERSION0, 0x2f),
(LH_VERSION1, 0x30),
(LHU_VERSION0, 0x31),
(LHU_VERSION1, 0x32),
(LUI, 0x33),
(LW_VERSION0, 0x34),
(LW_VERSION1, 0x35),
(LWU_VERSION0, 0x36),
(LWU_VERSION1, 0x37),
(MUL, 0x38),
(MULH, 0x39),
(MULHSU, 0x3a),
(MULHU, 0x3b),
(MULW, 0x3c),
(OR, 0x3d),
(ORI, 0x3e),
(REM, 0x3f),
(REMU, 0x40),
(REMUW, 0x41),
(REMW, 0x42),
(SB, 0x43),
(SD, 0x44),
(SH, 0x45),
(SLL, 0x46),
(SLLI, 0x47),
(SLLIW, 0x48),
(SLLW, 0x49),
(SLT, 0x4a),
(SLTI, 0x4b),
(SLTIU, 0x4c),
(SLTU, 0x4d),
(SRA, 0x4e),
(SRAI, 0x4f),
(SRAIW, 0x50),
(SRAW, 0x51),
(SRL, 0x52),
(SRLI, 0x53),
(SRLIW, 0x54),
(SRLW, 0x55),
(SUB, 0x56),
(SUBW, 0x57),
(SW, 0x58),
(XOR, 0x59),
(XORI, 0x5a),
(DIV, 0x17),
(DIVU, 0x18),
(DIVUW, 0x19),
(DIVW, 0x1a),
(LB_VERSION0, 0x1b),
(LB_VERSION1, 0x1c),
(LBU_VERSION0, 0x1d),
(LBU_VERSION1, 0x1e),
(LD_VERSION0, 0x1f),
(LD_VERSION1, 0x20),
(LH_VERSION0, 0x21),
(LH_VERSION1, 0x22),
(LHU_VERSION0, 0x23),
(LHU_VERSION1, 0x24),
(LUI, 0x25),
(LW_VERSION0, 0x26),
(LW_VERSION1, 0x27),
(LWU_VERSION0, 0x28),
(LWU_VERSION1, 0x29),
(MUL, 0x2a),
(MULH, 0x2b),
(MULHSU, 0x2c),
(MULHU, 0x2d),
(MULW, 0x2e),
(OR, 0x2f),
(ORI, 0x30),
(REM, 0x31),
(REMU, 0x32),
(REMUW, 0x33),
(REMW, 0x34),
(SB, 0x35),
(SD, 0x36),
(SH, 0x37),
(SLL, 0x38),
(SLLI, 0x39),
(SLLIW, 0x3a),
(SLLW, 0x3b),
(SLT, 0x3c),
(SLTI, 0x3d),
(SLTIU, 0x3e),
(SLTU, 0x3f),
(SRA, 0x40),
(SRAI, 0x41),
(SRAIW, 0x42),
(SRAW, 0x43),
(SRL, 0x44),
(SRLI, 0x45),
(SRLIW, 0x46),
(SRLW, 0x47),
(SUB, 0x48),
(SUBW, 0x49),
(SW, 0x4a),
(XOR, 0x4b),
(XORI, 0x4c),
// A
(LR_W, 0x5b),
(SC_W, 0x5c),
(AMOSWAP_W, 0x5d),
(AMOADD_W, 0x5e),
(AMOXOR_W, 0x5f),
(AMOAND_W, 0x60),
(AMOOR_W, 0x61),
(AMOMIN_W, 0x62),
(AMOMAX_W, 0x63),
(AMOMINU_W, 0x64),
(AMOMAXU_W, 0x65),
(LR_D, 0x66),
(SC_D, 0x67),
(AMOSWAP_D, 0x68),
(AMOADD_D, 0x69),
(AMOXOR_D, 0x6a),
(AMOAND_D, 0x6b),
(AMOOR_D, 0x6c),
(AMOMIN_D, 0x6d),
(AMOMAX_D, 0x6e),
(AMOMINU_D, 0x6f),
(AMOMAXU_D, 0x70),
(LR_W, 0x4d),
(SC_W, 0x4e),
(AMOSWAP_W, 0x4f),
(AMOADD_W, 0x50),
(AMOXOR_W, 0x51),
(AMOAND_W, 0x52),
(AMOOR_W, 0x53),
(AMOMIN_W, 0x54),
(AMOMAX_W, 0x55),
(AMOMINU_W, 0x56),
(AMOMAXU_W, 0x57),
(LR_D, 0x58),
(SC_D, 0x59),
(AMOSWAP_D, 0x5a),
(AMOADD_D, 0x5b),
(AMOXOR_D, 0x5c),
(AMOAND_D, 0x5d),
(AMOOR_D, 0x5e),
(AMOMIN_D, 0x5f),
(AMOMAX_D, 0x60),
(AMOMINU_D, 0x61),
(AMOMAXU_D, 0x62),
// B
(ADDUW, 0x71),
(ANDN, 0x72),
(BCLR, 0x73),
(BCLRI, 0x74),
(BEXT, 0x75),
(BEXTI, 0x76),
(BINV, 0x77),
(BINVI, 0x78),
(BSET, 0x79),
(BSETI, 0x7a),
(CLMUL, 0x7b),
(CLMULH, 0x7c),
(CLMULR, 0x7d),
(CLZ, 0x7e),
(CLZW, 0x7f),
(CPOP, 0x80),
(CPOPW, 0x81),
(CTZ, 0x82),
(CTZW, 0x83),
(MAX, 0x84),
(MAXU, 0x85),
(MIN, 0x86),
(MINU, 0x87),
(ORCB, 0x88),
(ORN, 0x89),
(REV8, 0x8a),
(ROL, 0x8b),
(ROLW, 0x8c),
(ROR, 0x8d),
(RORI, 0x8e),
(RORIW, 0x8f),
(RORW, 0x90),
(SEXTB, 0x91),
(SEXTH, 0x92),
(SH1ADD, 0x93),
(SH1ADDUW, 0x94),
(SH2ADD, 0x95),
(SH2ADDUW, 0x96),
(SH3ADD, 0x97),
(SH3ADDUW, 0x98),
(SLLIUW, 0x99),
(XNOR, 0x9a),
(ZEXTH, 0x9b),
(ADDUW, 0x63),
(ANDN, 0x64),
(BCLR, 0x65),
(BCLRI, 0x66),
(BEXT, 0x67),
(BEXTI, 0x68),
(BINV, 0x69),
(BINVI, 0x6a),
(BSET, 0x6b),
(BSETI, 0x6c),
(CLMUL, 0x6d),
(CLMULH, 0x6e),
(CLMULR, 0x6f),
(CLZ, 0x70),
(CLZW, 0x71),
(CPOP, 0x72),
(CPOPW, 0x73),
(CTZ, 0x74),
(CTZW, 0x75),
(MAX, 0x76),
(MAXU, 0x77),
(MIN, 0x78),
(MINU, 0x79),
(ORCB, 0x7a),
(ORN, 0x7b),
(REV8, 0x7c),
(ROL, 0x7d),
(ROLW, 0x7e),
(ROR, 0x7f),
(RORI, 0x80),
(RORIW, 0x81),
(RORW, 0x82),
(SEXTB, 0x83),
(SEXTH, 0x84),
(SH1ADD, 0x85),
(SH1ADDUW, 0x86),
(SH2ADD, 0x87),
(SH2ADDUW, 0x88),
(SH3ADD, 0x89),
(SH3ADDUW, 0x8a),
(SLLIUW, 0x8b),
(XNOR, 0x8c),
(ZEXTH, 0x8d),
// Mop
(WIDE_MUL, 0x9c),
(WIDE_MULU, 0x9d),
(WIDE_MULSU, 0x9e),
(WIDE_DIV, 0x9f),
(WIDE_DIVU, 0xa0),
(FAR_JUMP_REL, 0xa1),
(FAR_JUMP_ABS, 0xa2),
(ADC, 0xa3),
(SBB, 0xa4),
(ADCS, 0xa5),
(SBBS, 0xa6),
(ADD3A, 0xa7),
(ADD3B, 0xa8),
(ADD3C, 0xa9),
(CUSTOM_LOAD_UIMM, 0xaa),
(CUSTOM_LOAD_IMM, 0xab),
(WIDE_MUL, 0x8e),
(WIDE_MULU, 0x8f),
(WIDE_MULSU, 0x90),
(WIDE_DIV, 0x91),
(WIDE_DIVU, 0x92),
(ADC, 0x93),
(SBB, 0x94),
(ADCS, 0x95),
(SBBS, 0x96),
(ADD3A, 0x97),
(ADD3B, 0x98),
(ADD3C, 0x99),
(CUSTOM_LOAD_UIMM, 0x9a),
(CUSTOM_LOAD_IMM, 0x9b),
// All branches
(AUIPC, 0x9c),
(BEQ, 0x9d),
(BGE, 0x9e),
(BGEU, 0x9f),
(BLT, 0xa0),
(BLTU, 0xa1),
(BNE, 0xa2),
(EBREAK, 0xa3),
(ECALL, 0xa4),
(FENCE, 0xa5),
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(FENCEI, 0xa6),
(JAL, 0xa7),
(JALR_VERSION0, 0xa8),
(JALR_VERSION1, 0xa9),
(FAR_JUMP_REL, 0xaa),
(FAR_JUMP_ABS, 0xab),
(CUSTOM_TRACE_END, 0xac)
);
};
Expand Down Expand Up @@ -296,6 +297,9 @@ for_each_inst!(define_instruction);
pub const MINIMAL_OPCODE: InstructionOpcode = OP_UNLOADED;
pub const MAXIMUM_OPCODE: InstructionOpcode = OP_CUSTOM_TRACE_END;

pub const MINIMAL_BASIC_BLOCK_END_OPCODE: InstructionOpcode = OP_AUIPC;
pub const MAXIMUM_BASIC_BLOCK_END_OPCODE: InstructionOpcode = OP_FAR_JUMP_ABS;

macro_rules! inst_real_name {
($name:ident, $real_name:ident, $code:expr) => {
stringify!($real_name)
Expand Down
43 changes: 25 additions & 18 deletions src/instructions/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,8 @@ pub use self::register::Register;
use super::Error;
pub use ckb_vm_definitions::{
instructions::{
self as insts, instruction_opcode_name, Instruction, InstructionOpcode, MINIMAL_OPCODE,
self as insts, instruction_opcode_name, Instruction, InstructionOpcode,
MAXIMUM_BASIC_BLOCK_END_OPCODE, MINIMAL_BASIC_BLOCK_END_OPCODE, MINIMAL_OPCODE,
},
registers::REGISTER_ABI_NAMES,
};
Expand Down Expand Up @@ -410,23 +411,9 @@ pub fn is_slowpath_instruction(i: Instruction) -> bool {
}

pub fn is_basic_block_end_instruction(i: Instruction) -> bool {
matches!(
extract_opcode(i),
insts::OP_AUIPC
| insts::OP_JALR_VERSION0
| insts::OP_JALR_VERSION1
| insts::OP_BEQ
| insts::OP_BNE
| insts::OP_BLT
| insts::OP_BGE
| insts::OP_BLTU
| insts::OP_BGEU
| insts::OP_ECALL
| insts::OP_EBREAK
| insts::OP_JAL
| insts::OP_FAR_JUMP_ABS
| insts::OP_FAR_JUMP_REL
) | is_slowpath_instruction(i)
let opcode = extract_opcode(i);
(MINIMAL_BASIC_BLOCK_END_OPCODE..=MAXIMUM_BASIC_BLOCK_END_OPCODE).contains(&opcode)
|| is_slowpath_instruction(i)
}

#[inline(always)]
Expand Down Expand Up @@ -506,4 +493,24 @@ mod tests {
for_each_inst_fold!(update_max_opcode, o);
assert_eq!(MAXIMUM_OPCODE, o);
}

#[test]
fn test_basic_block_end_opcode_is_in_range() {
for o in MINIMAL_OPCODE..=MAXIMUM_OPCODE {
if is_basic_block_end_instruction(blank_instruction(o)) {
assert!(
o >= MINIMAL_BASIC_BLOCK_END_OPCODE,
"Opcode {} ({}) is smaller than minimal basic block end opcode!",
o,
instruction_opcode_name(o)
);
assert!(
o <= MAXIMUM_BASIC_BLOCK_END_OPCODE,
"Opcode {} ({}) is bigger than maximum basic block end opcode!",
o,
instruction_opcode_name(o)
);
}
}
}
}
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