Timers

Timers in the WPCM450 are split between five general timers and one watchdog timer.

device	MMIO	IRQ	comments
timers	0xb8001000	1, 12, 13, 14	general timers and watchdog are controlled by the same register block

The timer controller is very similar to the one found in the Winbond W90N745. The main difference is that the WPCM450 has five timers, whereas the W90N745 has only two.

The existing mainline timer driver for NPCM7xx uses the set of registers that is documented in the W90N745 datasheet.

TODO: check TISR w.r.t. different timers

Registers

name	offset	description
TCSR	per timer	Timer control and status register
TICR	per timer	Timer initial control register (24 bits)
TDR	per timer	Timer data register
TISR	0x18	Timer interrupt status register
WTCR	0x1c	Watchdog timer control register

TCSR, TISC, TDR are replicated for each of the five general timers. TISR and WTCR exist only once.

timer	TCSR	TICR	TDR	IRQ
0	0x00	0x08	0x10	12
1	0x04	0x0c	0x14	13
2	0x20	0x28	0x30	14
3	0x24	0x2c	0x34	14
4	0x40	0x48	0x50	14

Watchdog Timer

• To reset the system, write 0x82 to WTCR (0xb800101c).

References

• Register definitions
• ATEN driver
• Upstream timer driver for NPCM7xx
• Winbond W90N745 datasheet