feat(std_lib): Support extracting intermediate witnesses from a circuit using traces

[vezenovm]

Related issue(s)

Resolves #688

Description

CURRENTLY A DRAFT

This PR moves towards supporting the builtin std::trace. This specifies that we would like to log an intermediate witness, however, we would like to handle it in a way that differs from displaying it to standard output.

Relevant acvm PR: noir-lang/acvm#105
aztec_backend: noir-lang/acvm-backend-barretenberg#57

Summary of changes

With the switch to returning logs from the PWG rather than handling them inside of the PWG we were able to move away from needing the show_output flag on builtin::Println. With handling of logs happening inside of the PWG we were forced to pass down a flag during evaluation that cluttered up multiple functions and leads to other challenges. nargo now handles whether we display output during tests. We now follow Rust where if a test passes there is no output unless specified with a flag, and if a test fails we display the output.

• have to add support for builtin::Trace

Dependency additions / changes

Test additions / changes

Checklist

• I have tested the changes locally.
• I have formatted the changes with Prettier and/or cargo fmt with default settings.
• I have linked this PR to the issue(s) that it resolves.
• I have reviewed the changes on GitHub, line by line.
• I have ensured all changes are covered in the description.
• This PR requires documentation updates when merged.

Additional context

[vezenovm]

Closing in favor of #961 due to heavy merge conflicts as this PR has been hanging a while