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Add tgl tests for all modules
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
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@npmitche
npmitche committed Oct 23, 2023
1 parent a7df794 commit 7bdd6cb
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126 changes: 126 additions & 0 deletions tests/modules/test_tgl_modules.py
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# CHIPSEC: Platform Security Assessment Framework
# Copyright (c) 2ExitCode.OK23, Intel Corporation
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; Version 2.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA ExitCode.OK211ExitCode.OK-13ExitCode.OK1, USA.
#
# Contact information:
# chipsec@intel.com
#

# To execute: python -m unittest tests.modules.test_tgl_modules

import unittest
import os

from chipsec.module_common import ModuleResult
from chipsec.file import get_main_dir
from chipsec.testcase import ExitCode
from tests.modules.run_chipsec_module import setup_run_destroy_module

class TestTglModules(unittest.TestCase):
def setUp(self) -> None:
self.folder_path = os.path.join(get_main_dir(), "tests", "modules", "tgl")
self.init_replay_file = os.path.join(self.folder_path, "enumeration.json")

def derive_filename(self, module_name:str) -> str:
return f"{module_name.replace('.', '-')}_test.json"

def run_and_test_module(self, module_name:str, expected_returncode:int, mock_logger = True) -> None:
test_recording = self.derive_filename(module_name)
replay_file = os.path.join(self.folder_path, test_recording)
retval = setup_run_destroy_module(self.init_replay_file, module_name, module_replay_file=replay_file, mock_logger=mock_logger)
self.assertEqual(retval, expected_returncode, f"Expected: {expected_returncode} but got: {retval}")

def test_tgl_module_bios_smi(self):
self.run_and_test_module("common.bios_smi", ExitCode.OK)

def test_tgl_module_bios_ts(self):
self.run_and_test_module("common.bios_ts", ExitCode.OK)

def test_tgl_module_bios_wp(self):
self.run_and_test_module("common.bios_wp", ExitCode.OK)

def test_tgl_module_cpu_cpu_info(self):
self.run_and_test_module("common.cpu.cpu_info", ExitCode.INFORMATION)

def test_tgl_module_cpu_ia_untrusted(self):
self.run_and_test_module("common.cpu.ia_untrusted", ExitCode.OK)

def test_tgl_module_cpu_spectre_v2(self):
self.run_and_test_module("common.cpu.spectre_v2", ExitCode.OK)

def test_tgl_module_debugenabled(self):
self.run_and_test_module("common.debugenabled", ExitCode.OK)

def test_tgl_module_ia32cfg(self):
self.run_and_test_module("common.ia32cfg", ExitCode.OK)

def test_tgl_module_memconfig(self):
self.run_and_test_module("common.memconfig", ExitCode.OK)

def test_tgl_module_memlock(self):
self.run_and_test_module("common.memlock", ExitCode.NOTAPPLICABLE)

def test_tgl_module_me_mfg_mode(self):
self.run_and_test_module("common.me_mfg_mode", ExitCode.OK)

def test_tgl_module_remap(self):
self.run_and_test_module("common.remap", ExitCode.OK)

def test_tgl_module_rtclock(self):
self.run_and_test_module("common.rtclock", ExitCode.WARNING)

def test_tgl_module_secureboot_variables(self):
self.run_and_test_module("common.secureboot.variables", ExitCode.OK)

def test_tgl_module_sgx_check(self):
self.run_and_test_module("common.sgx_check", ExitCode.NOTAPPLICABLE)

def test_tgl_module_smm_code_chk(self):
self.run_and_test_module("common.smm_code_chk", ExitCode.OK)

def test_tgl_module_smm_dma(self):
self.run_and_test_module("common.smm_dma", ExitCode.OK)

def test_tgl_module_smm(self):
self.run_and_test_module("common.smm", ExitCode.NOTAPPLICABLE)

def test_tgl_module_smrr(self):
self.run_and_test_module("common.smrr", ExitCode.OK)

def test_tgl_module_spd_wd(self):
self.run_and_test_module("common.spd_wd", ExitCode.OK)

def test_tgl_module_spi_access(self):
self.run_and_test_module("common.spi_access", ExitCode.FAIL)

def test_tgl_module_spi_desc(self):
self.run_and_test_module("common.spi_desc", ExitCode.OK)

def test_tgl_module_spi_fdopss(self):
self.run_and_test_module("common.spi_fdopss", ExitCode.OK)

def test_tgl_module_spi_lock(self):
self.run_and_test_module("common.spi_lock", ExitCode.OK)

def test_tgl_module_uefi_access_uefispec(self):
self.run_and_test_module("common.uefi.access_uefispec", ExitCode.OK)

def test_tgl_module_uefi_s3bootscript(self):
self.run_and_test_module("common.uefi.s3bootscript", ExitCode.WARNING)



if __name__ == '__main__':
unittest.main()
13 changes: 13 additions & 0 deletions tests/modules/tgl/common-bios_kbrd_buffer_test.json
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{
"read_phys_mem": {
"(1050,4)": [
"\u0000\u0000\u0000\u0000"
],
"(1052,4)": [
"\u0000\u0000\u0000\u0000"
],
"(1054,32)": [
"\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000\u0000"
]
}
}
43 changes: 43 additions & 0 deletions tests/modules/tgl/common-bios_smi_test.json
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{
"read_pci_reg": {
"(0,31,2,0,4)": [
"4294967295",
"4294967295"
],
"(0,31,5,220,4)": [
"268437640"
],
"(0,31,2,32,4)": [
"4294967295",
"4294967295",
"4294967295",
"4294967295"
],
"(0,31,4,80,4)": [
"1025",
"1025"
],
"(0,31,2,20,4)": [
"4294967295",
"4294967295"
],
"(0,31,2,16,4)": [
"4294967295",
"4294967295"
]
},
"read_io_port": {
"(6192,4)": [
"2147491891",
"2147491891"
],
"(1032,2)": [
"6144"
]
},
"read_mmio_reg": {
"(4261416996,4)": [
"402960"
]
}
}
11 changes: 11 additions & 0 deletions tests/modules/tgl/common-bios_ts_test.json
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{
"read_pci_reg": {
"(0,31,5,220,4)": [
"268437640",
"268437640",
"268437640",
"268437640",
"268437640"
]
}
}
59 changes: 59 additions & 0 deletions tests/modules/tgl/common-bios_wp_test.json
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{
"read_pci_reg": {
"(0,31,5,16,4)": [
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072",
"1753219072"
],
"(0,31,5,220,4)": [
"268437674",
"268437674",
"268437674"
]
},
"read_mmio_reg": {
"(1753219160,4)": [
"536809472"
],
"(1753219204,4)": [
"0",
"0"
],
"(1753219208,4)": [
"0",
"0"
],
"(1753219212,4)": [
"0",
"0"
],
"(1753219216,4)": [
"0",
"0"
],
"(1753219220,4)": [
"0",
"0"
]
}
}
101 changes: 101 additions & 0 deletions tests/modules/tgl/common-cpu-cpu_info_test.json
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{
"cpuid": {
"(1,0)": [
"(526017, 118491136, 2147154879, 3219913727)",
"(526017, 84936704, 2147154879, 3219913727)",
"(526017, 51382272, 2147154879, 3219913727)",
"(526017, 17827840, 2147154879, 3219913727)",
"(526017, 101713920, 2147154879, 3219913727)",
"(526017, 68159488, 2147154879, 3219913727)",
"(526017, 34605056, 2147154879, 3219913727)",
"(526017, 1050624, 2147154879, 3219913727)"
],
"(2147483650,0)": [
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)",
"(1752445233, 1852131104, 1953384736, 1378380901)"
],
"(2147483651,0)": [
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)",
"(1866670121, 1411933554, 1763715405, 825306423)"
],
"(2147483652,0)": [
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)",
"(927413558, 840974368, 1194342446, 31304)"
]
},
"get_threads_count": {
"()": [
"8"
]
},
"set_affinity": {
"0": [
"0"
],
"1": [
"1"
],
"2": [
"2"
],
"3": [
"3"
],
"4": [
"4"
],
"5": [
"5"
],
"6": [
"6"
],
"7": [
"7"
]
},
"read_msr": {
"(0,139)": [
"(0, 172)"
],
"(1,139)": [
"(0, 172)"
],
"(2,139)": [
"(0, 172)"
],
"(3,139)": [
"(0, 172)"
],
"(4,139)": [
"(0, 172)"
],
"(5,139)": [
"(0, 172)"
],
"(6,139)": [
"(0, 172)"
],
"(7,139)": [
"(0, 172)"
]
}
}
34 changes: 34 additions & 0 deletions tests/modules/tgl/common-cpu-ia_untrusted_test.json
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{
"read_msr": {
"(0,337)": [
"(3, 0)",
"(3, 0)"
],
"(1,337)": [
"(3, 0)"
],
"(2,337)": [
"(3, 0)"
],
"(3,337)": [
"(3, 0)"
],
"(4,337)": [
"(3, 0)"
],
"(5,337)": [
"(3, 0)"
],
"(6,337)": [
"(3, 0)"
],
"(7,337)": [
"(3, 0)"
]
},
"get_threads_count": {
"()": [
"8"
]
}
}
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