Update references to functions in new library files

npmitche · Mar 22, 2024 · a933b13 · a933b13
1 parent e569136
commit a933b13
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Showing 108 changed files with 1,114 additions and 1,250 deletions.
diff --git a/chipsec/chipset.py b/chipsec/chipset.py
@@ -32,7 +32,7 @@
 from chipsec.exceptions import UnknownChipsetError, OsHelperError
 
 from chipsec.logger import logger
-from chipsec.defines import ARCH_VID
+from chipsec.library.defines import ARCH_VID
 from chipsec.library.register import Register
 from chipsec.library.lock import Lock
 from chipsec.library.control import Control
@@ -250,5 +250,5 @@ def cs():
     global _chipset
 
     if _chipset is None:
-        _chipset: Chipset = Chipset()
+        _chipset = Chipset()
     return _chipset
diff --git a/chipsec/config.py b/chipsec/config.py
@@ -22,7 +22,7 @@
 import importlib
 import os
 import xml.etree.ElementTree as ET
-from chipsec.defines import is_hex
+from chipsec.library.defines import is_hex
 from chipsec.exceptions import CSConfigError
 from chipsec.file import get_main_dir
 from chipsec.logger import logger

diff --git a/chipsec/defines.py b/chipsec/defines.py
diff --git a/chipsec/hal/acpi.py b/chipsec/hal/acpi.py
@@ -29,7 +29,7 @@
 from collections import defaultdict
 from collections import namedtuple
 
-from chipsec.defines import bytestostring
+from chipsec.library.defines import bytestostring
 from chipsec.exceptions import UnimplementedAPIError
 from chipsec.file import read_file
 from chipsec.hal import acpi_tables

diff --git a/chipsec/hal/cpu.py b/chipsec/hal/cpu.py
@@ -153,8 +153,8 @@ def get_number_sockets_from_APIC_table(self) -> int:
     # Return SMRR MSR physical base and mask
     #
     def get_SMRR(self) -> Tuple[int, int]:
-        smrambase = self.cs.read_register_field('IA32_SMRR_PHYSBASE', 'PhysBase', True)
-        smrrmask = self.cs.read_register_field('IA32_SMRR_PHYSMASK', 'PhysMask', True)
+        smrambase = self.cs.register.read_field('IA32_SMRR_PHYSBASE', 'PhysBase', True)
+        smrrmask = self.cs.register.read_field('IA32_SMRR_PHYSMASK', 'PhysMask', True)
         return (smrambase, smrrmask)
 
     #
@@ -173,13 +173,13 @@ def get_SMRR_SMRAM(self) -> Tuple[int, int, int]:
     def get_TSEG(self) -> Tuple[int, int, int]:
         if self.cs.is_server():
             # tseg register has base and limit
-            tseg_base = self.cs.read_register_field('TSEG_BASE', 'base', preserve_field_position=True)
-            tseg_limit = self.cs.read_register_field('TSEG_LIMIT', 'limit', preserve_field_position=True)
+            tseg_base = self.cs.register.read_field('TSEG_BASE', 'base', preserve_field_position=True)
+            tseg_limit = self.cs.register.read_field('TSEG_LIMIT', 'limit', preserve_field_position=True)
             tseg_limit += 0xFFFFF
         else:
             # TSEG base is in TSEGMB, TSEG limit is BGSM - 1
-            tseg_base = self.cs.read_register_field('PCI0.0.0_TSEGMB', 'TSEGMB', preserve_field_position=True)
-            bgsm = self.cs.read_register_field('PCI0.0.0_BGSM', 'BGSM', preserve_field_position=True)
+            tseg_base = self.cs.register.read_field('PCI0.0.0_TSEGMB', 'TSEGMB', preserve_field_position=True)
+            bgsm = self.cs.register.read_field('PCI0.0.0_BGSM', 'BGSM', preserve_field_position=True)
             tseg_limit = bgsm - 1
 
         tseg_size = tseg_limit - tseg_base + 1
@@ -211,10 +211,10 @@ def get_SMRAM(self) -> Tuple[int, int, int]:
     # Check that SMRR is supported by CPU in IA32_MTRRCAP_MSR[SMRR]
     #
     def check_SMRR_supported(self) -> bool:
-        mtrrcap_msr_reg = self.cs.read_register('MTRRCAP')
+        mtrrcap_msr_reg = self.cs.register.read('MTRRCAP')
         if logger().HAL:
-            self.cs.print_register('MTRRCAP', mtrrcap_msr_reg)
-        smrr = self.cs.get_register_field('MTRRCAP', mtrrcap_msr_reg, 'SMRR')
+            self.cs.register.print('MTRRCAP', mtrrcap_msr_reg)
+        smrr = self.cs.register.get_field('MTRRCAP', mtrrcap_msr_reg, 'SMRR')
         return (1 == smrr)
 
     #

diff --git a/chipsec/hal/igd.py b/chipsec/hal/igd.py
@@ -47,7 +47,7 @@ def __init__(self, cs):
     def __identify_device(self) -> Tuple[bool, bool]:
         if self.enabled is None:
             try:
-                self.dev_id = self.cs.read_register("PCI0.2.0_DID")
+                self.dev_id = self.cs.register.read("PCI0.2.0_DID")
                 self.enabled = (self.dev_id != 0xFFFF)
                 if self.enabled:
                     self.is_legacy = bool(self.dev_id < 0x1600)
@@ -57,14 +57,14 @@ def __identify_device(self) -> Tuple[bool, bool]:
         return (self.enabled, self.is_legacy)
 
     def is_enabled(self) -> bool:
-        if self.cs.register_has_field("PCI0.0.0_DEVEN", "D2EN") and self.cs.register_has_field("PCI0.0.0_CAPID0_A", "IGD"):
-            if self.cs.read_register_field("PCI0.0.0_DEVEN", "D2EN") == 1 and self.cs.read_register_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
+        if self.cs.register.has_field("PCI0.0.0_DEVEN", "D2EN") and self.cs.register.has_field("PCI0.0.0_CAPID0_A", "IGD"):
+            if self.cs.register.read_field("PCI0.0.0_DEVEN", "D2EN") == 1 and self.cs.register.read_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
                 return True
-        elif self.cs.register_has_field("PCI0.0.0_DEVEN", "D2EN"):
-            if self.cs.read_register_field("PCI0.0.0_DEVEN", "D2EN") == 1:
+        elif self.cs.register.has_field("PCI0.0.0_DEVEN", "D2EN"):
+            if self.cs.register.read_field("PCI0.0.0_DEVEN", "D2EN") == 1:
                 return True
-        elif self.cs.register_has_field("PCI0.0.0_CAPID0_A", "IGD"):
-            if self.cs.read_register_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
+        elif self.cs.register.has_field("PCI0.0.0_CAPID0_A", "IGD"):
+            if self.cs.register.read_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
                 return True
         return self.is_device_enabled()
 

diff --git a/chipsec/hal/interrupts.py b/chipsec/hal/interrupts.py
@@ -36,7 +36,7 @@
 from chipsec.logger import logger, print_buffer_bytes
 from chipsec.hal.acpi import ACPI
 from chipsec.hal.acpi_tables import UEFI_TABLE, GAS
-from chipsec.defines import bytestostring
+from chipsec.library.defines import bytestostring
 
 SMI_APMC_PORT = 0xB2
 SMI_DATA_PORT = 0xB3
@@ -69,8 +69,8 @@ def send_SMI_APMC(self, SMI_code_port_value: int, SMI_data_port_value: int) -> N
 
     def send_NMI(self) -> None:
         logger().log_hal("[intr] Sending NMI# through TCO1_CTL[NMI_NOW]")
-        reg, ba = self.cs.get_IO_space("TCOBASE")
-        tcobase = self.cs.read_register_field(reg, ba)
+        reg, ba = self.cs.device.get_IO_space("TCOBASE")
+        tcobase = self.cs.register.read_field(reg, ba)
         return self.cs.io.write_port_byte(tcobase + NMI_TCO1_CTL + 1, NMI_NOW)
 
     def find_ACPI_SMI_Buffer(self) -> Optional[UEFI_TABLE.CommBuffInfo]: