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adedd debug logs in ACL eltwise executor
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@alvoron
alvoron committed Feb 22, 2024
1 parent c729201 commit b7c14a8
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Showing 5 changed files with 41 additions and 10 deletions.
4 changes: 2 additions & 2 deletions cmake/features.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -44,9 +44,9 @@ endif()

ov_dependent_option (ENABLE_ONEDNN_FOR_GPU "Enable oneDNN with GPU support" ${ENABLE_ONEDNN_FOR_GPU_DEFAULT} "ENABLE_INTEL_GPU" OFF)

ov_option (ENABLE_DEBUG_CAPS "enable OpenVINO debug capabilities at runtime" OFF)
ov_option (ENABLE_DEBUG_CAPS "enable OpenVINO debug capabilities at runtime" ON)
ov_dependent_option (ENABLE_GPU_DEBUG_CAPS "enable GPU debug capabilities at runtime" ON "ENABLE_DEBUG_CAPS;ENABLE_INTEL_GPU" OFF)
ov_dependent_option (ENABLE_CPU_DEBUG_CAPS "enable CPU debug capabilities at runtime" ON "ENABLE_DEBUG_CAPS;ENABLE_INTEL_CPU" OFF)
ov_dependent_option (ENABLE_CPU_DEBUG_CAPS "enable CPU debug capabilities at runtime" ON "ENABLE_DEBUG_CAPS;ENABLE_INTEL_CPU" ON)
ov_dependent_option (ENABLE_SNIPPETS_DEBUG_CAPS "enable Snippets debug capabilities at runtime" ON "ENABLE_DEBUG_CAPS" OFF)

ov_option (ENABLE_PROFILING_ITT "Build with ITT tracing. Optionally configure pre-built ittnotify library though INTEL_VTUNE_DIR variable." OFF)
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34 changes: 32 additions & 2 deletions src/plugins/intel_cpu/src/nodes/executors/acl/acl_eltwise.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@

#include "acl_eltwise.hpp"
#include "acl_utils.hpp"
#include "utils/debug_capabilities.h"

namespace ov {
namespace intel_cpu {
Expand Down Expand Up @@ -94,6 +95,10 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
case Algorithm::EltwiseHswish:
if (!(checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
Expand All @@ -103,6 +108,10 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
if (!(checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) ||
checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
Expand All @@ -113,6 +122,10 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) ||
checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
Expand All @@ -123,6 +136,10 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) ||
checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
Expand All @@ -134,6 +151,10 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
checkPrecision({ov::element::i16, ov::element::i16}, ov::element::i16) ||
checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
Expand All @@ -149,20 +170,29 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs,
checkPrecision({ov::element::i32, ov::element::i32}, ov::element::u8) ||
checkPrecision({ov::element::f16, ov::element::f16}, ov::element::u8) ||
checkPrecision({ov::element::f32, ov::element::f32}, ov::element::u8))) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
DEBUG_LOG(algToString(eltwiseAttrs.algorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
return false;
}
break;
default:
DEBUG_LOG("Eltwise algorithm ", algToString(eltwiseAttrs.algorithm), " is not supported");
return false;
}

for (const auto & srcDesc : srcDescs) {
if (getAclDataLayoutByMemoryDesc(srcDesc) == arm_compute::DataLayout::UNKNOWN)
if (getAclDataLayoutByMemoryDesc(srcDesc) == arm_compute::DataLayout::UNKNOWN) {
DEBUG_LOG("src descriptor layout is unknown");
return false;
}
}
for (const auto & dstDesc : dstDescs) {
if (getAclDataLayoutByMemoryDesc(dstDesc) == arm_compute::DataLayout::UNKNOWN)
if (getAclDataLayoutByMemoryDesc(dstDesc) == arm_compute::DataLayout::UNKNOWN) {
DEBUG_LOG("dst descriptor layout is unknown");
return false;
}
}

return true;
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9 changes: 4 additions & 5 deletions src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -317,14 +317,13 @@ void Transformations::PreLpt(const std::vector<ov::element::Type>& defaultPrecis
if (!hasHardwareSupport(ov::element::bf16))
map.insert({ov::element::bf16, ov::element::f32});
#if defined(OPENVINO_ARCH_ARM) || defined(OPENVINO_ARCH_ARM64)
if (hasHardwareSupport(ov::element::f16)) {
if (inferencePrecision != ov::element::f16) {
if (!hasHardwareSupport(ov::element::f16) ||
(hasHardwareSupport(ov::element::f16) && inferencePrecision != ov::element::f16)) {
map.insert({ov::element::f16, ov::element::f32});
}
return map;
}
#endif
#else
map.insert({ov::element::f16, ov::element::f32});
#endif
return map;
};

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2 changes: 1 addition & 1 deletion src/plugins/intel_cpu/src/utils/debug_capabilities.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ namespace {

DebugLogEnabled::DebugLogEnabled(const char* file, const char* func, int line, const char* name) {
// check ENV
const char* p_filters = std::getenv("OV_CPU_DEBUG_LOG");
const char* p_filters = "-";//std::getenv("OV_CPU_DEBUG_LOG");
if (!p_filters) {
enabled = false;
return;
Expand Down
2 changes: 2 additions & 0 deletions src/plugins/intel_cpu/src/utils/precision_support.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@

#if defined(OV_CPU_WITH_ACL)
#include "arm_compute/core/CPP/CPPTypes.h"
#include "debug_capabilities.h"
#endif

namespace ov {
Expand All @@ -24,6 +25,7 @@ static bool hasFP16HardwareSupport(const ov::element::Type& precision) {
return true;
return false;
#elif defined(OV_CPU_WITH_ACL)
DEBUG_LOG("hasFP16HardwareSupport: ", arm_compute::CPUInfo::get().has_fp16());
return arm_compute::CPUInfo::get().has_fp16();
#else
return false;
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