chore: add sp1 eDSL #87
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jonathanpwang
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Jun 24, 2024
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Also add a comment somewhere that the initial import is taken from SP1 under MIT license. |
cocohearts
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Jun 28, 2024
jonathanpwang
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* feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * feat: air struct, columns struct, from_slice * comments * moving old page_controller inside page_read * updateing comment * completed group_by main air and chip * chore: remove input_bus * chore: add is_alloc column for arb page lengths * saving copies * merged final_page from PR #45 (page r/w checker) * full merge for page-rw-checker * wip: inner join * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * remove group-by-output, add subair and subairbridge for group-by * enforcing unallocated rows to be zero * aligning with new less than chip * wip * using Air::eval instead of SubAir::eval * fix comment * wip * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct * wip * chore: revising integration tests, fixing more width and index bugs * controller complete * controller complete * chore: fixed constraint/width bugs, debugging interactions * chore: finish merge * chore: finish merge * adding less than constraints * adding comments * more comments * chore: cleaning code, merging common::page characteristics * chore: debugging widths * chore: fixed more indexing bugs, searching for interaction bug * chore: refactor col_index_map using Range<usize> * added keygen and prove functions to controller * added verify function to controller * feat: add `check-cumulative_sums` to debug prover * chore: turn off debug for negative tests * feat: fix final bug * feat: last debug, generalizing and expanding testcases * chore: refactor tests with abstractions, rename to tests.rs * chore: correct previous commit, adding tests.rs to history * chore: refactor using Page::random * chore: refactor set_up_keygen_builder * debugging unallocated rows * chore: filter group-by-input.request() by allocated rows, refactor row allocation in tests * feat: adjusting constraints for unallocated rows, adding group_by_alloc column for unallocated rows * docs(chips): method and constraint docstrings * feat: corrected constraints and added complete group_by vec range, debugging range-bus error * fix: imp page_controller::refresh_range_checker, iterated tests now work * feat: negative tests that prank final_chip trace values, docs * docs(page_controller, tests): comprehensive docstrings and inline comments * Add additional page_controller fns, add static test (#100) * chore: auto-implement `Rap` when builder is not `Sync` (#80) * [feat] Query binary (#46) * Add MVP bin * Add MVP bin * Update cache command * Refactor cmd line items * Mock subcommand + logical interface updates * Update interface for reading db * Change interface to read * Change interface to read * Add write command * Add output command for write * Feat/m1 execution air (#66) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * wip * wip * feat: execution air finished --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Add print flag to afi command, update readmes * Update warnings * wip keygen * wip: start prove * Predicate * wip: prove and verify * change branches * Add to_page for Table * Use btreemap * Update functions * Update page to/from * Update tests * Add predicate binary * wip: proof not serializable * chore: patch stuff * add serde bounds * feat: zk commands (not debugged yet) * update mockdb * wip: mold into new format * chore: remove extraneous stuff * [WIP: query-binary] Merge r/w changes (#69) * Add is_less_than_bits chip (#60) * Add is_less_than_bits chip * Address zlangely's comments * Remove chip and use from_bool * Use row_mut * Add comments explaining comparison_check * Add alt version of is_less_than_bits chip * Replace is_less_than_bits with alt version, address comments * Fix lint issues * Feat/is less than bits tuple chip (#63) * Add is_less_than_tuple_bits chip * Incorporate is_less_than_bits feedback into is_less_than_tuple_bits * Add is_less_than_tuple_bits chip * Use match and cmp instead of else if * Adjust for new is_less_than_bits chip * chore: remove range_max field from IsLessThanAir and IsLessThanTupleAir (#65) * chore: derive serialize for proof (#67) * feat: page read write checker (#45) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * comments * moving old page_controller inside page_read * updateing comment * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * enforcing unallocated rows to be zero * aligning with new less than chip * using Air::eval instead of SubAir::eval * fix comment * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Update to/from page and table tests * Update tests * chore: satisfy clippy (#68) * Fix execution_air test * Update --------- Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: bfan05 <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * Tmp: remove predicate * Update readme * Update commands for newest rows * feat: add tracing and switch default fri params to log_blowup_factor = 3 * chore: update logging * Fix readme typo * Fix clippy warnings * Update to handle input byte lengths * Remove extraneous code * Revert 9f02efc^..9bad23e * Update logical interface to add byte lengths * Remove generics from logical-interface * merging new Offline Checker changes * Revert "change branches" This reverts commit ec8639f. * Update mock read/write commands * chore: add `mock describe` command * chore: do not overwrite db if exists * chore: remove schema config * chore: switch config back to data_bytes=1024 --------- Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> * perf: Offline Checker Optimization (#82) * perf: removed 2*data_len columns from the offline checker * renaming to air * Add macros for testing * Additional tests * Remove unused function * Update naming and add comment * Feat/rename page air update from slice (#84) * feat: rename my page air and update from slice * add renamed files * feat: rename final page air * chore: fix lint and rename idx_limb_bits --------- Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * chore: add sp1 eDSL (#87) * chore: make fields public in SumAir (#88) * feat: main chips for VM (#76) --------- Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * feat: added enum for operation, bool for sorted, adjust get_width(), request() * feat: drop group_by_page from aux_trace if self.sorted * feat: drop page from column index_map if sorted * feat: update interactions to not send internally if sorted * chore: add to lib.rs, rename to receiving_indexed_output_page_air * chore: fix linter, tests still pass in unsorted case * feat: from_partitioned_slice, tests pass * Feat/Verify Aggregation VM with binary (#89) * Create stark-vm crate * Add lib.rs, add afs-chips dependency, add CPU chip * Make and use OpCode enum * Refactor CPU tests Refactor CPU tests, add positive tests for CPU, fix relevant bugs in AIR and trace generation * Add program chip Add program chip, move instruction frequency calculation to CPU trace, add positive tests for program * Actually add program chip Include program chip (+ positive tests) in commit (forgot to last time), add negative tests, change cpu::trace::Memory to return 0 for cells that haven't been written to, change CPU's generate_trace to terminate when pc goes out of bounds (previously was only when pc = -1) * feat: imp arithmetic unit, minus tests * Use destructuring in cpu/air.rs * Add negative test for CPU * Reformat cpu and program * chore: fix generate_trace, remove AUChip and replace with AUAir * Add explanations for test programs * chore: resolve conflict * Derive new for instruction Add dependency on derive-new, derive new for Instruction, use that in cpu/tests/mod.rs, add comment explaining program used in test_negative. * chore: change Operation to MemoryAccess * Align MemoryAccess with memory chip Refactor MemoryAccess for eventual merge with memory::MemoryAccess. Analogously change MemoryAccessCols.value to .data for consistency. * fix(au): width misalignment, incorrect trace generation * fix(au bridge): positive tests run * fix(trace): fix bug in AUCols::new, add negative tests * chore: rename AUAir -> FieldArithmeticAir, remove AUChip * Add terminate instruction Add terminate instruction, and use to make sure CPU trace height is power of 2. Also make sure that program trace height is power of 2 by adding jumps to same instruction. Refactor tests using ::from_size to construct Instruction, MemoryAccess, ArithmeticOperation. * chore: un-expand constraints using AB::Expr::one() * Address some zlangley comments * docs(au) * Commit zlangley suggestion Co-authored-by: Zach Langley <zach@axiom.xyz> * Commit zlangley suggestion Co-authored-by: Zach Langley <zach@axiom.xyz> * Make inst_width.clone() unnecessary * Address zlangley comment * Rename as_b, as_c to d, e * feat: Memory op interactions * Add negative test for termination check * Add failing test for secret write vulnerability * Add failing test for disable write vulnerability * Add failing test for disable read vulnerability * Check access enabled in AIR * Actually fix access enabled check * Simplify cpu/tests/mod.rs * Don't mock arithmetic chip when testing with is_field_arithmetic = false * chore: add test for invalid read * Attempt to write integration test * Conditionally use arith chip in integration test * Fix integration test wrt range checker * Lint * Use unique memory timestamp instead of clock cycle * chore: rename MemoryAccess clock field to timestamp * feat: change default FRI config to blowup factor 4 (#73) * feat: Offline Checker delete support (#74) * added new columns * squashing inner_join * feat: supporting delete in Offline Checker * removing pub * adding option in controller to provide initial ProverData * keeping page_controller as a directory for simplicity * adding option to generate ProverTraceData * addressing comments * deriving new in PageCols * feat: add engines for BabyBear with blake3 and keccak256 (#78) * chore: auto-implement `Rap` when builder is not `Sync` (#80) * [feat] Query binary (#46) * Add MVP bin * Add MVP bin * Update cache command * Refactor cmd line items * Mock subcommand + logical interface updates * Update interface for reading db * Change interface to read * Change interface to read * Add write command * Add output command for write * Feat/m1 execution air (#66) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * wip * wip * feat: execution air finished --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Add print flag to afi command, update readmes * Update warnings * wip keygen * wip: start prove * Predicate * wip: prove and verify * change branches * Add to_page for Table * Use btreemap * Update functions * Update page to/from * Update tests * Add predicate binary * wip: proof not serializable * chore: patch stuff * add serde bounds * feat: zk commands (not debugged yet) * update mockdb * wip: mold into new format * chore: remove extraneous stuff * [WIP: query-binary] Merge r/w changes (#69) * Add is_less_than_bits chip (#60) * Add is_less_than_bits chip * Address zlangely's comments * Remove chip and use from_bool * Use row_mut * Add comments explaining comparison_check * Add alt version of is_less_than_bits chip * Replace is_less_than_bits with alt version, address comments * Fix lint issues * Feat/is less than bits tuple chip (#63) * Add is_less_than_tuple_bits chip * Incorporate is_less_than_bits feedback into is_less_than_tuple_bits * Add is_less_than_tuple_bits chip * Use match and cmp instead of else if * Adjust for new is_less_than_bits chip * chore: remove range_max field from IsLessThanAir and IsLessThanTupleAir (#65) * chore: derive serialize for proof (#67) * feat: page read write checker (#45) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * comments * moving old page_controller inside page_read * updateing comment * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * enforcing unallocated rows to be zero * aligning with new less than chip * using Air::eval instead of SubAir::eval * fix comment * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Update to/from page and table tests * Update tests * chore: satisfy clippy (#68) * Fix execution_air test * Update --------- Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: bfan05 <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * Tmp: remove predicate * Update readme * Update commands for newest rows * feat: add tracing and switch default fri params to log_blowup_factor = 3 * chore: update logging * Fix readme typo * Fix clippy warnings * Update to handle input byte lengths * Remove extraneous code * Revert 9f02efc^..9bad23e * Update logical interface to add byte lengths * Remove generics from logical-interface * merging new Offline Checker changes * Revert "change branches" This reverts commit ec8639f. * Update mock read/write commands * chore: add `mock describe` command * chore: do not overwrite db if exists * chore: remove schema config * chore: switch config back to data_bytes=1024 --------- Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> * perf: Offline Checker Optimization (#82) * perf: removed 2*data_len columns from the offline checker * renaming to air * Add macros for testing * Additional tests * Remove unused function * Update naming and add comment * Feat/rename page air update from slice (#84) * feat: rename my page air and update from slice * add renamed files * feat: rename final page air * chore: fix lint and rename idx_limb_bits --------- Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * VM binary * Resolve merge conflicts * Add back fibonacci integration test * Redo CLI test * Remove extraneous au directory * Fix lint * Remove keys and proof * Remove commented code * Use FromStr to parse OpCode * VM* -> Vm*, VM -> VirtualMachine * Return Result from VmConfig::read_config_file * Minor zlangley comments * Remove 8 * Use zip for chips and traces Co-authored-by: Zach Langley <zach@axiom.xyz> * zip_eq -> zip * Use Path and replace unwrap with ? * Removed unnecessary casts * Fix lint * Address jonathan comments, fix proof file path * Delete prove.bin * Use zip_eq and remove unnecessary clones * Use eyre::Result in asm/mod.rs * Fix lint --------- Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Yu Jiang Tham <ytham@users.noreply.github.com> Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: Yu Jiang Tham <yoojbruin@gmail.com> * Chore/Remove CpuChip (#94) * Remove CpuChip * Remove CpuChip * Rebase * Feat/convert sp1 compiler to output our ISA (#93) * Conversion to ISA working for Fibonacci * Modify signature of conversion functions to allow nontrivial extension field * Fix utility register * Fix translation of load and store instrucctions for size != 1 * Fix SubFIN and DivFIN compilation Note: should add test to check DivFIN * Remove now unused instruction.rs * Fix lint * Fix lint 2 * Return execution from execute_program * fix: error where answer became intermediate columns * fix: error where answer became intermediate columns * fix: fixed width issues, progressing to constraint issues * fix: fixed width issues, progressing to constraint issues * fix: request allocation generation, group_by cols for sorted cases * chore: adjusting tests to have multiplicity in rows * chore: IndexScanPageAir use from_partitioned_slice (#97) * chore: IndexScanPageAir use from_partitioned_slice * chore: directly use local_page and local_aux * chore: address comments * chore: use tip * chore: fixing randomized colliding page generation * fix: caught typo in interactions, unsorted tests pass * fix: bug in sorted page generation, tests now pass * chore: randomizing (trimming) negative test loops * chore: address review comments * feat: page controller loads cached `ProverTraceData` * chore: reduce test cases for speed --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: Yu Jiang Tham <ytham@users.noreply.github.com> Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: Yu Jiang Tham <yoojbruin@gmail.com>
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* feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * feat: air struct, columns struct, from_slice * comments * moving old page_controller inside page_read * updateing comment * completed group_by main air and chip * chore: remove input_bus * chore: add is_alloc column for arb page lengths * saving copies * merged final_page from PR #45 (page r/w checker) * full merge for page-rw-checker * wip: inner join * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * remove group-by-output, add subair and subairbridge for group-by * enforcing unallocated rows to be zero * aligning with new less than chip * wip * using Air::eval instead of SubAir::eval * fix comment * wip * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct * wip * chore: revising integration tests, fixing more width and index bugs * controller complete * controller complete * chore: fixed constraint/width bugs, debugging interactions * chore: finish merge * chore: finish merge * adding less than constraints * adding comments * more comments * chore: cleaning code, merging common::page characteristics * chore: debugging widths * chore: fixed more indexing bugs, searching for interaction bug * chore: refactor col_index_map using Range<usize> * added keygen and prove functions to controller * added verify function to controller * feat: add `check-cumulative_sums` to debug prover * chore: turn off debug for negative tests * feat: fix final bug * feat: last debug, generalizing and expanding testcases * chore: refactor tests with abstractions, rename to tests.rs * chore: correct previous commit, adding tests.rs to history * chore: refactor using Page::random * chore: refactor set_up_keygen_builder * debugging unallocated rows * chore: filter group-by-input.request() by allocated rows, refactor row allocation in tests * feat: adjusting constraints for unallocated rows, adding group_by_alloc column for unallocated rows * docs(chips): method and constraint docstrings * feat: corrected constraints and added complete group_by vec range, debugging range-bus error * fix: imp page_controller::refresh_range_checker, iterated tests now work * feat: negative tests that prank final_chip trace values, docs * docs(page_controller, tests): comprehensive docstrings and inline comments * Add additional page_controller fns, add static test (#100) * chore: auto-implement `Rap` when builder is not `Sync` (#80) * [feat] Query binary (#46) * Add MVP bin * Add MVP bin * Update cache command * Refactor cmd line items * Mock subcommand + logical interface updates * Update interface for reading db * Change interface to read * Change interface to read * Add write command * Add output command for write * Feat/m1 execution air (#66) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * wip * wip * feat: execution air finished --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Add print flag to afi command, update readmes * Update warnings * wip keygen * wip: start prove * Predicate * wip: prove and verify * change branches * Add to_page for Table * Use btreemap * Update functions * Update page to/from * Update tests * Add predicate binary * wip: proof not serializable * chore: patch stuff * add serde bounds * feat: zk commands (not debugged yet) * update mockdb * wip: mold into new format * chore: remove extraneous stuff * [WIP: query-binary] Merge r/w changes (#69) * Add is_less_than_bits chip (#60) * Add is_less_than_bits chip * Address zlangely's comments * Remove chip and use from_bool * Use row_mut * Add comments explaining comparison_check * Add alt version of is_less_than_bits chip * Replace is_less_than_bits with alt version, address comments * Fix lint issues * Feat/is less than bits tuple chip (#63) * Add is_less_than_tuple_bits chip * Incorporate is_less_than_bits feedback into is_less_than_tuple_bits * Add is_less_than_tuple_bits chip * Use match and cmp instead of else if * Adjust for new is_less_than_bits chip * chore: remove range_max field from IsLessThanAir and IsLessThanTupleAir (#65) * chore: derive serialize for proof (#67) * feat: page read write checker (#45) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * comments * moving old page_controller inside page_read * updateing comment * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * enforcing unallocated rows to be zero * aligning with new less than chip * using Air::eval instead of SubAir::eval * fix comment * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Update to/from page and table tests * Update tests * chore: satisfy clippy (#68) * Fix execution_air test * Update --------- Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: bfan05 <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * Tmp: remove predicate * Update readme * Update commands for newest rows * feat: add tracing and switch default fri params to log_blowup_factor = 3 * chore: update logging * Fix readme typo * Fix clippy warnings * Update to handle input byte lengths * Remove extraneous code * Revert 9f02efc^..9bad23e * Update logical interface to add byte lengths * Remove generics from logical-interface * merging new Offline Checker changes * Revert "change branches" This reverts commit ec8639f. * Update mock read/write commands * chore: add `mock describe` command * chore: do not overwrite db if exists * chore: remove schema config * chore: switch config back to data_bytes=1024 --------- Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> * perf: Offline Checker Optimization (#82) * perf: removed 2*data_len columns from the offline checker * renaming to air * Add macros for testing * Additional tests * Remove unused function * Update naming and add comment * Feat/rename page air update from slice (#84) * feat: rename my page air and update from slice * add renamed files * feat: rename final page air * chore: fix lint and rename idx_limb_bits --------- Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * chore: add sp1 eDSL (#87) * chore: make fields public in SumAir (#88) * feat: main chips for VM (#76) --------- Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * feat: added enum for operation, bool for sorted, adjust get_width(), request() * feat: drop group_by_page from aux_trace if self.sorted * feat: drop page from column index_map if sorted * feat: update interactions to not send internally if sorted * chore: add to lib.rs, rename to receiving_indexed_output_page_air * chore: fix linter, tests still pass in unsorted case * feat: from_partitioned_slice, tests pass * Feat/Verify Aggregation VM with binary (#89) * Create stark-vm crate * Add lib.rs, add afs-chips dependency, add CPU chip * Make and use OpCode enum * Refactor CPU tests Refactor CPU tests, add positive tests for CPU, fix relevant bugs in AIR and trace generation * Add program chip Add program chip, move instruction frequency calculation to CPU trace, add positive tests for program * Actually add program chip Include program chip (+ positive tests) in commit (forgot to last time), add negative tests, change cpu::trace::Memory to return 0 for cells that haven't been written to, change CPU's generate_trace to terminate when pc goes out of bounds (previously was only when pc = -1) * feat: imp arithmetic unit, minus tests * Use destructuring in cpu/air.rs * Add negative test for CPU * Reformat cpu and program * chore: fix generate_trace, remove AUChip and replace with AUAir * Add explanations for test programs * chore: resolve conflict * Derive new for instruction Add dependency on derive-new, derive new for Instruction, use that in cpu/tests/mod.rs, add comment explaining program used in test_negative. * chore: change Operation to MemoryAccess * Align MemoryAccess with memory chip Refactor MemoryAccess for eventual merge with memory::MemoryAccess. Analogously change MemoryAccessCols.value to .data for consistency. * fix(au): width misalignment, incorrect trace generation * fix(au bridge): positive tests run * fix(trace): fix bug in AUCols::new, add negative tests * chore: rename AUAir -> FieldArithmeticAir, remove AUChip * Add terminate instruction Add terminate instruction, and use to make sure CPU trace height is power of 2. Also make sure that program trace height is power of 2 by adding jumps to same instruction. Refactor tests using ::from_size to construct Instruction, MemoryAccess, ArithmeticOperation. * chore: un-expand constraints using AB::Expr::one() * Address some zlangley comments * docs(au) * Commit zlangley suggestion Co-authored-by: Zach Langley <zach@axiom.xyz> * Commit zlangley suggestion Co-authored-by: Zach Langley <zach@axiom.xyz> * Make inst_width.clone() unnecessary * Address zlangley comment * Rename as_b, as_c to d, e * feat: Memory op interactions * Add negative test for termination check * Add failing test for secret write vulnerability * Add failing test for disable write vulnerability * Add failing test for disable read vulnerability * Check access enabled in AIR * Actually fix access enabled check * Simplify cpu/tests/mod.rs * Don't mock arithmetic chip when testing with is_field_arithmetic = false * chore: add test for invalid read * Attempt to write integration test * Conditionally use arith chip in integration test * Fix integration test wrt range checker * Lint * Use unique memory timestamp instead of clock cycle * chore: rename MemoryAccess clock field to timestamp * feat: change default FRI config to blowup factor 4 (#73) * feat: Offline Checker delete support (#74) * added new columns * squashing inner_join * feat: supporting delete in Offline Checker * removing pub * adding option in controller to provide initial ProverData * keeping page_controller as a directory for simplicity * adding option to generate ProverTraceData * addressing comments * deriving new in PageCols * feat: add engines for BabyBear with blake3 and keccak256 (#78) * chore: auto-implement `Rap` when builder is not `Sync` (#80) * [feat] Query binary (#46) * Add MVP bin * Add MVP bin * Update cache command * Refactor cmd line items * Mock subcommand + logical interface updates * Update interface for reading db * Change interface to read * Change interface to read * Add write command * Add output command for write * Feat/m1 execution air (#66) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * wip * wip * feat: execution air finished --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Add print flag to afi command, update readmes * Update warnings * wip keygen * wip: start prove * Predicate * wip: prove and verify * change branches * Add to_page for Table * Use btreemap * Update functions * Update page to/from * Update tests * Add predicate binary * wip: proof not serializable * chore: patch stuff * add serde bounds * feat: zk commands (not debugged yet) * update mockdb * wip: mold into new format * chore: remove extraneous stuff * [WIP: query-binary] Merge r/w changes (#69) * Add is_less_than_bits chip (#60) * Add is_less_than_bits chip * Address zlangely's comments * Remove chip and use from_bool * Use row_mut * Add comments explaining comparison_check * Add alt version of is_less_than_bits chip * Replace is_less_than_bits with alt version, address comments * Fix lint issues * Feat/is less than bits tuple chip (#63) * Add is_less_than_tuple_bits chip * Incorporate is_less_than_bits feedback into is_less_than_tuple_bits * Add is_less_than_tuple_bits chip * Use match and cmp instead of else if * Adjust for new is_less_than_bits chip * chore: remove range_max field from IsLessThanAir and IsLessThanTupleAir (#65) * chore: derive serialize for proof (#67) * feat: page read write checker (#45) * feat: sorted_limbs chip checking each limb less than limb_bits bits * wip * feat: completed sorted_limbs chip with tests * wip * feat: SortedLimbsChip with LessThan subchip * feat: less_than subchip refactored * feat: rename SortedLimbsChip to AssertSortedChip and write LessThanChip tests * chore: change name of assert sorted chip * chore: fix names in tests for AssertSortedChip * chore: address comments * chore: cleanup * chore: change MAX from generic to instance field for LessThanChip and AssertSortedChip * wip: added extra bits to middle chip trace * wip * adding connection to IsEqualVec chip * feat: IsLessThanChip to compare two numbers * feat: IsLessThanTuple subchip for different limb_bits * test: added tests for partially and non-allocated pages * test: added negative tests * added constraints * adding comments * feat: IsLessThanTupleChip subchip in AssertSortedChip * renaming * removing TODO comments * fixing clippy * chore: renaming to idx and data * chore: address comments first pass * chore: moving page_controller inside page_read * chore: refactor AssertSorted, IsEqual, IsLessThan, and IsLessThanTuple chips * chore: address comments * chore: eliminate high dim poly from IsLessThanTupleChip * chore: fix tests * chore: address comments for AssertSortedChip * chore: cleanup AssertSorted * chore: cleanup * chore: include roundtrip flatten and from_slice tests * feat: flatten and from_slice for IO and Aux columns * wip: final page chip * remove txt file * feat: final_page_chip * feat: integrating all chips for page_read_write * fixing lib * using field bits() * adding extra communication between checker and final chip * muting clippy * renaming to AIR * adding comments * comment fix * optimization to one less bus * comments * moving old page_controller inside page_read * updateing comment * feat: more general FinalPageAir * making IsEqualVecAuxCols clonable * enforcing unallocated rows to be zero * aligning with new less than chip * using Air::eval instead of SubAir::eval * fix comment * removed arguments from load_page for readability * addressing comments and adding common/ directory with Page struct --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * Update to/from page and table tests * Update tests * chore: satisfy clippy (#68) * Fix execution_air test * Update --------- Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: bfan05 <76703988+bfan05@users.noreply.github.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Zach Langley <zach@axiom.xyz> * Tmp: remove predicate * Update readme * Update commands for newest rows * feat: add tracing and switch default fri params to log_blowup_factor = 3 * chore: update logging * Fix readme typo * Fix clippy warnings * Update to handle input byte lengths * Remove extraneous code * Revert 9f02efc^..9bad23e * Update logical interface to add byte lengths * Remove generics from logical-interface * merging new Offline Checker changes * Revert "change branches" This reverts commit ec8639f. * Update mock read/write commands * chore: add `mock describe` command * chore: do not overwrite db if exists * chore: remove schema config * chore: switch config back to data_bytes=1024 --------- Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> * perf: Offline Checker Optimization (#82) * perf: removed 2*data_len columns from the offline checker * renaming to air * Add macros for testing * Additional tests * Remove unused function * Update naming and add comment * Feat/rename page air update from slice (#84) * feat: rename my page air and update from slice * add renamed files * feat: rename final page air * chore: fix lint and rename idx_limb_bits --------- Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> * VM binary * Resolve merge conflicts * Add back fibonacci integration test * Redo CLI test * Remove extraneous au directory * Fix lint * Remove keys and proof * Remove commented code * Use FromStr to parse OpCode * VM* -> Vm*, VM -> VirtualMachine * Return Result from VmConfig::read_config_file * Minor zlangley comments * Remove 8 * Use zip for chips and traces Co-authored-by: Zach Langley <zach@axiom.xyz> * zip_eq -> zip * Use Path and replace unwrap with ? * Removed unnecessary casts * Fix lint * Address jonathan comments, fix proof file path * Delete prove.bin * Use zip_eq and remove unnecessary clones * Use eyre::Result in asm/mod.rs * Fix lint --------- Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Yu Jiang Tham <ytham@users.noreply.github.com> Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: Yu Jiang Tham <yoojbruin@gmail.com> * Chore/Remove CpuChip (#94) * Remove CpuChip * Remove CpuChip * Rebase * Feat/convert sp1 compiler to output our ISA (#93) * Conversion to ISA working for Fibonacci * Modify signature of conversion functions to allow nontrivial extension field * Fix utility register * Fix translation of load and store instrucctions for size != 1 * Fix SubFIN and DivFIN compilation Note: should add test to check DivFIN * Remove now unused instruction.rs * Fix lint * Fix lint 2 * Return execution from execute_program * fix: error where answer became intermediate columns * fix: error where answer became intermediate columns * fix: fixed width issues, progressing to constraint issues * fix: fixed width issues, progressing to constraint issues * fix: request allocation generation, group_by cols for sorted cases * chore: adjusting tests to have multiplicity in rows * chore: IndexScanPageAir use from_partitioned_slice (#97) * chore: IndexScanPageAir use from_partitioned_slice * chore: directly use local_page and local_aux * chore: address comments * chore: use tip * chore: fixing randomized colliding page generation * fix: caught typo in interactions, unsorted tests pass * fix: bug in sorted page generation, tests now pass * chore: randomizing (trimming) negative test loops * chore: address review comments * feat: page controller loads cached `ProverTraceData` * chore: reduce test cases for speed --------- Co-authored-by: bfan <76703988+bfan05@users.noreply.github.com> Co-authored-by: Osama Alkhodairy <osama.khodairy@hotmail.com> Co-authored-by: Jonathan Wang <31040440+jonathanpwang@users.noreply.github.com> Co-authored-by: Alex Zhao <alexzhao@intrinsictech.com> Co-authored-by: Yu Jiang Tham <ytham@users.noreply.github.com> Co-authored-by: MonkeyKing-1 <67293785+MonkeyKing-1@users.noreply.github.com> Co-authored-by: Zach Langley <zach@axiom.xyz> Co-authored-by: TlatoaniHJ <TlatoaniHJ@users.noreply.github.com> Co-authored-by: Yu Jiang Tham <yoojbruin@gmail.com>
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