Seeed Studio
Replies: 29 comments 65 replies
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Just wanted to say hi! |
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I love the XIAO Sense boards, but I've had zero success in replacing CircuitPython with MicroPython. CircuitPython has its advantages, but if the platform is really going to find its feet, I think XIAO needs to step away from proprietary builds. Is there a path toward providing MicroPython XIAOs out of the box? If so, let me know! |
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Totally agree, if we are talking Python we gotta be looking at microPython. |
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Can someone explain why it matters? CP is a derivative of MP, so why would anyone care which was being used? |
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CP is created and maintained by a company, Adafruit. MP was not. Don't they say it is always better to run away from things created by companies? |
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... And I don't want to appear that I'm ganging up - anyone can Google the differences between the two versions - but the significant differences are Libraries are different, CP is optimised for Adafruit boards, and MP has a larger, more diverse community. Adafruit has a vested interest in selling their own hardware. I'm not saying they're evil: just a business. Their business model is built around hobbyists, beginners and one-time-job users, and it's in their interests to make using their gear easy, curated, error-free. Commendable points. However, the far wider userbase includes non-Adafruit equipment users, with HUGE populations in the sciences, research and development, APIs to databases, as well as new users of Python. If you start using CircuitPython to operate with MicroPython environments, things will break. In short: CircuitPython keeps you safe, but in the nursery for the rest of your programming experiences. MicroPython is less resilient, but positions you and your systems for growth, adaptability, interoperation and extension. |
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Hi! What I like most of the Xiao family of boards are: the compact form-factor, the castellated pins that make them easy to integrate into a final design, and the great value . Please find below some suggestions:
All the best! |
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Guys, do you think the features on the logic analyser are the features that XIAO needs when working on a project? I'm considering whether to add this feature on Debugger, but we need to balance the cost. |
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There are many points here.
For Seeed, launching a set of debugger, logic analyser and ammeter that easily connect to the Xiao board would expand the Xiao appeal. They could be separate or combined. Just consider the Raspberry Pi Debug probe. I really liked the initial Xiao Expansion Board as it provided an easy way to connect a debugger. |
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Number 2 is an artificial problem. The world figured out that the low-end J-Links are essentially a BluePill and the Saleaes the common Cypress application note design. Each of those companies wanted to associate them as gateway products to their higher-end stuff (which IS different) and distinguish them from the $7 equivalents flooding the market. (Perfectly, I'm quite happy to not have to move my J-Link from project to project and just leave a cheapie all wired in while the project gets pushed to the back of my project. Each had a software edge years and years ago, but the open-source alternatives overtook each. So the pricing on those two products is artificial. Isn't the Pi Debug probe just an RP2040 in USB/{PIO,GPIO} bridge mode with the processor doing the bit bashing to drive SWD/JTAG/etc. to handle the fast port without a host transfer turnaround? Oh, and the other half in UART mode for console? $12 is a fair price for it, but it's "just" another Bluepill or ESP32 or B618 at the hardware level like I described below, right? I don't have one but was studying them earlier in the week. What makes them awesome? I've meant to wire up an ESP32 in this mode. Wireless JTAG sounds cool. Still, the JTAG/cJTAG/SWD That's a crowded market, full of products racing to the bottom. It'd be difficult to be distinctive in this space. The software ecosystem may present opportunities, but with new devices coming out every week, just tracking physical connections and minimal boundary scan and synch/asynch debugging being unique for each, it's almost suicide to try to be unique—you almost HAVE to be a clone of things that are already supported to get any traction at all. That's why everything is masquerading as FTDI's MPSSE. Examples: https://github.com/sipeed/RV-Debugger-BL702/blob/main/firmware/app/usb2uartjtag/usbd_ftdi.c How could Seeed Studio awesomeize this industry...or at least your workstation? (I'm just a bystander that's interested in such things.) |
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One of the markets Seeed addresses is education. So the offer isn't limited to the device and basic software, but includes examples and training. |
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Actually, we didn't plan to make this Debug Tool to be competitive with traditional Debugger, and we know that it's not realistic, neither software nor patents are our strong point. What we want to build is a tool designed specifically for XIAO that can do things like Debug, TTL, power statistics and even logic analyser. Reduce the threshold for XIAO users to advance from Arduino to PlatformIO, ESP-IDF and other platforms, both in terms of wiring and the need for frequent switching between a bunch of tools. Since it's designed for XIAO, my vision is that it needs to be compatible with all XIAOs, and it needs to be simple enough to connect, as well as have connectivity compatibility with our other XIAO peripherals. I think this is the most important factor to make this product a favourite. |
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Like the XAIO RP2040 in particular, which I used mostly with personalised circuitpython builds. The software experience is good enough at present, but I agree that very many smaller MCU platforms fail on the software, so looking after that side is IMO important. Specifically, a template project for non-trivial Rust development would be an interesting path. I also agree that the castellated pads are good and wouldn't wish xaio to go down the route of e.g. the QtPy (with components both sides) because that makes it harder to use. I disagree with rei-vilo in that I find the USB-C connector very useful for data+power supply and it is lovely this is a standard connector so no custom leads to find. I can see some advantage in including a battery powered xaio in the range, though I don't know how it could be done in the board space available. I wouldn't object to flying leads as connection to the battery, if that helps. Could xaio go double-decker? Would it be possible to add a parallel board "on top" to house e.g. battery charge circuit or swd pins? I too like the RP debug probe, (though not it's connector). If there was a way to improve the debug experience that would be interesting but I can't think of any practical changes because of the small space available. How I use it: I've built several boards where the xaio rp2040 is the core of what could loosely be called an IoT device, such as temp/humidity sensor with integration to prometheus for server environment monitoring. I have also built a PC-style temperature sensor fan controller where the rp2040 acts as the control hub and usb interface. |
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Have used the ESP32-C6 and loved it, just waiting for the CircuitPython and micropython binaries. The Xiao form factor is just amazing for small projects. Would like to see chips from more vendors, for example Texas and Microchip. This is in order for users to learn other ecosystems. Also an interesting fact about the -C6 I faced: I put an ams1117-3.3 to supply the Xiao and it did not like it, ended up supllying the Vin with 5v directly |
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please provide any ideas for XIOA master system ... grove modues and expansion boards... |
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It is really simple to compile circuitpython for your boars (presuming the basic port is there). I would expect the same is true for micropython. Have a go! |
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It really isn't. Tried twice to load MicroPython on the XIAO Sense - Bricked it both times :/ |
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https://www.seeedstudio.com/Grove-Beginner-Kit-for-Arduino-p-4549.html I want to make a XIAO version of this device with as many extra stuff that can be found uesful for XIAO development... That is for Kids ... this one will be for the big boys |
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Hello, I develop luminous katana using XIAO nRF52840 Sense. To enhance experience developing small gadgets, I would like the following items.
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That little board extension is AWESOME! they are thinking of comming out with a XIAO Pro which is longer! more exposed GPIO pins |
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I love the XIAO Series. specially latest C6 which contains the zigbee update. But still we need the following features in XIAO series. 1-LoRaWAN |
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what do you mean by "thread support"? Is this a wireless protocol like "matter" or multiple processes running on chip, or multiple CPUs, or something else? Zibgee/Matter/... hardware is chip dependent, so the ESP and nRF devices tend to have something, others don't. The Xiao format is not large enough to add more large chips, so... |
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I think he's referring to OpenThread support. |
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CC1101 x Xiao for low cost, enterprise-grade sub gig applications? |
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Better than the CC1101, I would recommend the CC1312 / CC1352 from Texas Instruments. It is already supported by a fork of Arduino, Energia, which additionally brings an RTOS, TI-RTOS. The CC1312 features sub-1 GHz, while the CC1352 combines sub-1 GHz and 2.4 GHz with Bluetooth. The previous iteration was CC1310 and CC1350. |
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Hey thanks chief, I am new to SDR and cc1101 is my only point of reference. |
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I would really like to see an improved version of the Xiao Expansion Board, with TFT display and I2S sound output, using the max98357a, keeping SD Card, RTC and battery. |
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Done: only missed the RTC and the battery: https://twitter.com/USpizig/status/1772355887870439928 |
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I'd love to see a lora+gps+ble(beaco)+battery mini tracking device (for my cats). the only design that comes close is the "katzentracker" but I am afraid that has turned into vapourware |
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I would like a PoE injector for the Xiao series that can also be used to transfer data. This would be fantastic for outdoor use, especially for the mmwave modules. |
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For the Xiao Pro, could we consider extra length for additional pins while keeping the same width 0.6"? The extra space would host
Now, the ESP32 seems to require more debugging signals for JTAG. |
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There is an extremely loyalty inducing aspect to seeing companies and organizations that value and implement their customers suggestions. Glad to see you doing so! |
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THanks, @xenoglyph! |
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Congratulations on winning the XIAO Relay Box. Please contact us at seeedlive@seeed.cc to claim your voucher. @xenoglyph |
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@xenoglyph |
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Btw, pls kindly note that we’ll cover the shipping fee but the custom duties (if any) will be covered by the recipient. Are u okay with it? |
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Could u send an email to this address: seeedlive@seeed.cc? We couldn't make the delivery without ur email address. The email address u replied before was encrypted and I can't see it. |
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You made a very fast release of the Xiao RP2350. In my opinion this was too fast.
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Congratulations on winning the XIAO Relay Box. Please contact us at seeedlive@seeed.cc to claim your voucher. @Uspizig |
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Could you please make on the XIAO ESP32-S3 Sense a proper GPIO0 and RESET Pad on the back. This would help soo much during development |
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I would love a XIAO nRF52840 dongle with a male usb interface. This would be especially useful as a dongle for popular ZMK split keyboards. Now there are some nRF52840 dongles out there, but they are quite large. With a minimal enclosure plugged into a USB-Hub, the castellated IO on both side is probably too wide for such a dongle. I would argue that IO pins are not needed for a minimal dongle use case. Perhaps have some solder pads on the underside for people who really do need it for their usecase. And otherwise make the footprint as small as possible. |
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Congratulations on winning the XIAO Relay Box！We already sent u an email regarding the details. |
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You should have a XIAO module with an STM32WLE5JC microcontroller in your offer. It is also worth considering a base board for XIAO with RS485 and CAN transceivers. |
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Hi @MSDreamLab, thanks for your suggestion. Yes, we got quite an amount of embedding the popular STM2WLE5JC to XIAO. Since the size of the MCU is a bit too big for the classic form factor, the team is working hard to locate another solution. :) Regarding RS485, we'll have an add-on very soon. Stay tuned. As for CAN, did you know that we already have a CAN Bus Breakout Board for XIAO, which you can play around CAN with XIAO? |
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Congratulations on winning the XIAO Relay Box. Please contact us at seeedlive@seeed.cc to claim your voucher. @MSDreamLab |
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the new xiao relay board is awesome |
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Congratulations on winning the XIAO Relay Box. Please contact us at seeedlive@seeed.cc to claim your voucher. |
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thank you I already send an email to seeedlive@seeed.cc |
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XIAO |
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Congratulations on winning the XIAO Relay Box. Please contact us at seeedlive@seeed.cc to claim your voucher. @SemTex-H |
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Xiao... LOL |
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Congratulations on winning the XIAO Relay Box. We've sent u a message through LinkedIn abt the redeem details. @PjGLasso |
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Got it a few days ago, It's Awesome. I'm making a 3D printable enclosure.... Stay tuned. where is the Demo code repo located? TY 👍 |
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Please take care of privacy |
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Please take care of privacy |
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Guys, I don't know if you're paying attention to the transmission of your personal data in the reply to these messages. Wouldn't it be better to communicate via email? |
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Below are three Xiao boards: each one has its own "standard". Needless to say, I am a bit lost. How to ensure compatibility between the different footprints?
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The standardized is the form factor… the 14 pins the usb connector and the 4 pogo pins… everything else is evolving due to the increased capabilities of the new processors based on the SAMD which it was originally designed… I think the battery pin location is becoming standard. I am not too sure about interlacing the extra grip between the castellated pins be we will see |
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Sure, but why two different implementations?
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They are two options to get access to |
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To their credit, the ESP32S3 also has the "important" 14 pins in the same place. Clockwise: D0-D10: 3.3V, GND, +5-maybe. Being able to flip between three distinctly different architectures while having some degree of pin compatibility is pretty nifty. There's some extra stuff available on extra pins if you need it, but by then, you're probably nailed down to an architecture and ready to commit. I could imagine a passive little carrier with the castellation pins that brought the pins in the middle down off the end of the board, if you really need to breadboard with a chip like the one on the right, but you're kind of out of the target audience for the SuperMini form factor at that point. Personally, unless I'm really sure what my designs will look like before I start, I do my prototyping on boards with a TON of pins (my preferred S3 board has 44 pins, which makes it a pain to socket, but at $4.50, I don't care that much) and take heavy advantage of the pin remapping multiplexer on that part to put the right pins in the right place for me. Need a via to swap I2C pins over there? Poof! One line of code later, they're over there right out of the chip. Pogo's are definitely a hassle for this. If you're plopping those modules with microcastellations onto a low-volume custom board from the likes of JLCPCB or PCBWay, can they handle modules like that? What does mixing castellations and THT in such close proximity do to assembly costs? I understand the urge to keep SKUs low, and I also understand that with a V-cut ($$$), perhaps the odds of killing a board when breaking off the back end are reduced, but there's a psychological aspect to breaking off and throwing away a board with two buttons and/or grove sockets. That board looks like a populated version of https://schmartboard.com/schmartboard-2-pack-of-schmartboard-ez-1-27mm-pitch-soic-to-dip-adapter-and-a-free-breadboard/ A move to a 1.27 mm pitch seems inevitable if the goal is to get the pin count up and keep the package size relatively fixed, but such breadboards are much less common and, in my opinion, makes it less accessible to hobbyists. Hand soldering 1.27 mm seems more than twice as difficult as soldering 2.54 for those of us of a certain, uh, tenure. You can never satisfy all markets with any one product. I find the current scheme OK. If I need a BIGGER package, I just don't start with (or in my case, scale down to) anything with |
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What about something like this?
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do an optional sketch with the breakable along the 7 pin rows
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Nice design. One question: How to use such a board on a breadboard with two different GPIOs on the same row? |
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nice question... you cant ... but you could put one row with pins down as usual and one row with pins up and connect directly to with dupont wires.... also you cant use the current system on a breadboard either.. with the micro castalated pin |
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Are 1.27 bbs a thing? I get they're less common and we all have a basket of 2.54s. |
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for hobby and prototyping i dont see the need to make it smaller... if something truly needs to be that small you will have problems powering it... and the device will probably be embeded in a custom pcb for final production so my vote is to keep it easy for prototyping and experimentation |
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I'll be honest: the hobbyist market is already pretty well served by the
PulseView, plus the endless stream of cheap 24 MHz/8-channel Cypress clones
that are fine for I2C, SPI, LCD, and other various signals commonly found
in hobbyist interfaces.
A step above that, I was excited for the project that became the Sipeed
SLogic Combo 8, which boasted USB3 so it could capture in real time so you
didn't' need to futz endlessly with how to capture a sample into a tiny
buffer but didn't. Was supposed to work with Sigrok, but doesn't. Was
supposed to not violate GPL, but didn't. Was supposed to have 16 channels
but shipped with 8, and so on. Now that I've talked it up, I'll admit that
I have a useless Combo 8 because they never released the Mac support for it
and never released the source for their hacked-up version of Sigrok. It was
supposed to use the BL618(?) internally to do high-speed capture, and I
think they got a reality check when that chip only shipped with USB2, but
their hacked-up Sigrok and unwillingness to release source code for
firmware really was annoying. We "know" that a LA that doubles as a UART
and debugger interface is "just" eight I/O pins, some clever firmware,
and—hopefully—some clever front-end electronics that allow it to not load
and distort the signal under test while still providing enough drive to act
as a UART. They talked that product up for months and months, and what they
shipped was a disappointment. Please feel free to build the product they
promised and not the product they built. You don't HAVE to compete against
the $7 LA's with a better $11 LA. Make a GOOD $20 or $30 LA. (OR a really
awesome one for not a whole lot more...) Much above this and you run into
the bottom end of the standalone units.
On debugger boards, the market is against saturated with glorified GPIO
boards over a USB bridge that was dominated by FTDI 232 (2332?) boards
15-10 years ago and now, increasingly with other chips but the same idea.
Again, it's so close to the above board that I think Sipeed even offered a
different firmware build for the above board that let it pretend to be a
JTAG/DAP/that weird interface that Alibaba uses, ran an openocd and/or gdb
remote serial protocol on the board (blackmagic
<https://github.com/espressif/esp-usb-bridge> or espressif
<https://black-magic.org/getting-started.html>) to get the high-speed
timing stuff off of the USB bridge. For most cases, this is just a case of
loading common firmware onto the boards we all have dozens of already.
ST-Links and Blackpills are common, and just about every SOC I've seen with
a USB interface has at least some implementation of firmware that does
this, putting JTAG on one side and USB (often emulating that FTDI protocol
just because it's so well understood by host software) on the other. The
price range here is zero (harsh, but we all have these little eval
boards...) to $15 or so. It seems a tough market to compete in, too.
The next step up from here, and one I'm only now beginning to really
explore, seems to be the freshly revived Bus Pirate line that uses an
RP2040/2350 to use the high-speed PIO engines for the GPIO bashing and adds
a reasonably programmable core and a screen AND a fast host connection.
They combine all of the above, topping the analyzer at 60Msps on 8
channels, but it works either with the standalone LCD or via
Sigrok/Pulseview. Some features, like JTAG, are in alternate firmwares, but
classics like JTagulator are present, which lets you kind of guess on JTAG
pinouts, and it figures them out. It's more expensive than everything else
here, but the hardware is super. It's just a familiar army knife of tools
for working with random digital components and pays so much attention to
things like actual voltages on the "digital" signals and letting you script
conversations with parts in isolation BEFORE you solder them down to a
board, onboard current sensing and measurement, and so on. It's not an
exaggeration to say it's a plane above the three previous entries.
Given your commitment to ESP parts, the need for that third class largely
disappears in all of the post-2016 designs. They all have JTAG on the chip
itself, serving as an endpoint on the USB interface, looking very much like
the aforementioned FTDI interface and ready for OpenOCD and friends, with
no need for a JTAG probe at all. It's quite nifty. Combine that with their
built-in second endpoint, a CDC interface, and you can power, debug, and
get serial I/O all from one USB cable. It's nice to work with, and
essentially no cost for development boards if you have a USB socket anyway.
I'd LOVE to see more chip makers adopting this scheme.
So, understanding that you can't *totally* lay out your product plans, what
product niche out there do you see being underserved? There was a time when
the functionality of all these things was out of reach of even a moderately
committed hobbyist, but I don't see a space to much improve upon the price
or feature set of the first three of those product classes. What do you see
really improving upon here?
I'll readily admit this thread is discussing so many different ideas—and
GitHub doesn't really do threading in topics—that I've lost the beat on
what proposals and questions are actually being asked about any of them.
…On Wed, Jan 15, 2025 at 7:38 PM Citric Li ***@***.***> wrote:
Guys, do you think the features on the logic analyser are the features
that XIAO needs when working on a project? I'm considering whether to add
this feature on Debugger, but we need to balance the cost.
—
Reply to this email directly, view it on GitHub
<#1 (reply in thread)>,
or unsubscribe
<https://github.com/notifications/unsubscribe-auth/ACCSD3YBZNLH3ASQLQZRROL2K4EQZAVCNFSM6AAAAABIG7QOPSVHI2DSMVQWIX3LMV43URDJONRXK43TNFXW4Q3PNVWWK3TUHMYTCOBUHE2DENA>
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You are receiving this because you are subscribed to this thread.Message
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Thank you so much for taking the time to share your detailed thoughts and feedback! it’s incredibly motivating to see such engagement from the community! |
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Yes, that is why I created a different thread for the Affordable programmer-debugger probe by Seeed. |
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I think this thread is getting way too long... probably needs some orginization |
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and others
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👋 Welcome to the Roadmap Discussions of Seeed XIAO.
We’re using this Discussion as a platform to connect with and get valuable feedback from the vibrant community of all XIAO owners. Here we'll share our dev roadmap proposals for the beloved XIAO (new features, new functions, new products for both XIAO boards and their accessories). And at the same time, we're inviting you to join to co-create the whole process by:
Please be open-minded and remember that this is a community we build together 💪.
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