Repositories list

• ece4750-sec11-sys

  Public
  ECE 4750 Section 11: Lab 4 Head Start

  Verilog

  •2•0•0•0•Updated Nov 8, 2024Nov 8, 2024

• ece4750-sec0405

  Public
  ECE 4750 Section 4 and 5: Lab 2 Head Start

  Verilog

  •4•0•0•0•Updated Sep 29, 2023Sep 29, 2023

• ece4750-sec-bug-a-palooza

  Public
  ECE 4750 Section 6: Bug-a-palooza

  Verilog

  •2•0•0•0•Updated Sep 29, 2023Sep 29, 2023

• ece4750-sec04-proc

  Public
  ECE 4750 Section 4: Lab 2 Head Start

  Verilog

  •4•1•0•0•Updated Sep 22, 2023Sep 22, 2023

• ece4750-sec03-verilator

  Public
  ECE 4750 Section 3: RTL Testing with Verilator

  Verilog

  •3•0•0•0•Updated Sep 8, 2023Sep 8, 2023

• ece4750-sec03-pymtl

  Public
  ECE 4750 Section 3: RTL Testing with Python

  Verilog

  •3•0•0•0•Updated Sep 8, 2023Sep 8, 2023

• ece4750-sec02-verilog

  Public
  ECE 4750 Section 2: RTL Design with Verilog

  Verilog

  •16•2•0•0•Updated Sep 7, 2023Sep 7, 2023

• ece4750-sec01-linux

  Public
  ECE 4750 Section 1: Linux Development Environment

  42•0•0•0•Updated Aug 23, 2023Aug 23, 2023

• ece4750-sec12-net

  Public
  ECE 4750 Section 12: Networks

  Verilog

  •3•0•0•0•Updated Dec 2, 2022Dec 2, 2022

• ece4750-sec08-mem

  Public
  ECE 4750 Section 8: Lab 3 Head Start

  Verilog

  •3•0•0•0•Updated Nov 2, 2022Nov 2, 2022

• ece4750-sec09-mem-rtest-queues

  Public
  ECE 4750 Section 9: Memory Random Testing and Queues

  Verilog

  •3•1•0•0•Updated Oct 28, 2022Oct 28, 2022

• ece4750-sec05-bug-hunt

  Public
  ECE 4750 Section 5: Bug Hunt

  Verilog

  •2•0•0•0•Updated Sep 24, 2022Sep 24, 2022

• ece4750-tut2-git

  Public
  ECE 4750 Tutorial 2: Git Distributed Version Control System

  378•5•0•11•Updated Sep 7, 2022Sep 7, 2022

• ece4750-tut3-verilog

  Public
  ECE 4750 Tutorial 3: Verilog Hardware Description Language

  Verilog

  •189•3•0•0•Updated Sep 1, 2022Sep 1, 2022