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P4C-DPDK - Incorrect constant value when there is a substract operation involved with a constant #3411
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backends/dpdk/dpdkHelpers.cpp
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32 bit or 64 bit if the bit-width of constant is greater than 32 bit | ||
*/ | ||
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if (!isEightBitAligned(src2Op) && src2Op->is<IR::Constant>()) { |
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Shouldn't sign-extension be done for non-constant values too? Otherwise I think that overflow handling will be incorrect.
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Added shift operation for sign extension for non-constant value
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if (!isEightBitAligned(left) && !isSignExtended) { | ||
if (right->is<IR::Add>() || right->is<IR::Sub>() || | ||
right->is<IR::Shl>() || right->is<IR::Shr>()) { | ||
auto width = left->type->width_bits(); |
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Maybe you want to use the Constant class, this may overflow in C++.
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Sorry. I did not get the comment. Could you please add more to understand?
backends/dpdk/dpdkHelpers.cpp
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if (right->is<IR::Add>() || right->is<IR::Sub>() || | ||
right->is<IR::Shl>() || right->is<IR::Shr>()) { | ||
auto width = left->type->width_bits(); | ||
auto mask = (1 << width) - 1; |
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1 << width may overflow in C++, but if you use the constant class to compute it, it won't.
Constant(1) << width.
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…on involved with a constant
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Looks like several dpdk tests are failing with this change. |
Updated the outputs |
This PR addresses the issue in dpdk backend when there is subtraction operation with constant.
If isSigned flag is set and is not 8-bit aligned, sign extension (32/64 bit) is done for the constant
If isSigned flag is not set and is not 8-bit aligned,
insert an "BAnd" node after the "Add" for masking the value to the original bitwidth.