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Dpdk Backend: Fix shift overlimit error for valid bit slicing operation #3578

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Oct 17, 2022
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12 changes: 6 additions & 6 deletions backends/bmv2/common/lower.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -83,13 +83,13 @@ const IR::Node* LowerExpressions::postorder(IR::Cast* expression) {
} else if (destType->width_bits() < srcType->width_bits()) {
// explicitly discard un needed bits from src
auto one = new IR::Constant(srcType, 1);
auto shift_value = new IR::Constant(srcType, destType->width_bits());
auto shift_value = new IR::Constant(new IR::Type_InfInt(), destType->width_bits());
auto shl = new IR::Shl(one->srcInfo, one, shift_value);
auto mask = new IR::Sub(shl->srcInfo, shl, one);
auto and0 = new IR::BAnd(expression->srcInfo, expression->expr, mask);
auto cast0 = new IR::Cast(expression->srcInfo, destType, and0);
typeMap->setType(one, srcType);
typeMap->setType(shift_value, srcType);
typeMap->setType(shift_value, shift_value->type);
typeMap->setType(shl, srcType);
typeMap->setType(mask, srcType);
typeMap->setType(and0, srcType);
Expand Down Expand Up @@ -117,10 +117,10 @@ const IR::Node* LowerExpressions::postorder(IR::Slice* expression) {
BUG_CHECK(e0type->is<IR::Type_Bits>(), "%1%: expected a bit<> type", e0type);
const IR::Expression* expr;
if (l != 0) {
auto one = new IR::Constant(l);
auto one = new IR::Constant(new IR::Type_InfInt(), l);
expr = new IR::Shr(expression->e0->srcInfo, expression->e0, one);
typeMap->setType(expr, e0type);
typeMap->setType(one, e0type);
typeMap->setType(one, one->type);
} else {
expr = expression->e0;
}
Expand Down Expand Up @@ -152,7 +152,7 @@ const IR::Node* LowerExpressions::postorder(IR::Concat* expression) {
unsigned sizeofb = type->to<IR::Type_Bits>()->size;
auto cast0 = new IR::Cast(expression->left->srcInfo, resulttype, expression->left);
auto cast1 = new IR::Cast(expression->right->srcInfo, resulttype, expression->right);
auto sizefb0 = new IR::Constant(sizeofb);
auto sizefb0 = new IR::Constant(new IR::Type_InfInt(), sizeofb);
auto sh = new IR::Shl(cast0->srcInfo, cast0, sizefb0);
big_int m = Util::maskFromSlice(sizeofb, 0);
auto mask = new IR::Constant(expression->right->srcInfo,
Expand All @@ -165,7 +165,7 @@ const IR::Node* LowerExpressions::postorder(IR::Concat* expression) {
typeMap->setType(sh, resulttype);
typeMap->setType(and0, resulttype);
typeMap->setType(mask, resulttype);
typeMap->setType(sizefb0, resulttype);
typeMap->setType(sizefb0, sizefb0->type);
LOG3("Replaced " << expression << " with " << result);
return result;
}
Expand Down
5 changes: 0 additions & 5 deletions backends/dpdk/DpdkXfail.cmake
Original file line number Diff line number Diff line change
@@ -1,8 +1,3 @@
p4c_add_xfail_reason("dpdk"
"shift amount limited to 64 bits on this target"
testdata/p4_16_samples/psa-example-register2-bmv2.p4
)

p4c_add_xfail_reason("dpdk"
"Expected packet length argument for count method of indirect counter"
testdata/p4_16_samples/psa-example-counters-bmv2.p4
Expand Down
66 changes: 34 additions & 32 deletions testdata/p4_16_samples_outputs/psa-example-register2-bmv2.p4.spec
Original file line number Diff line number Diff line change
Expand Up @@ -45,18 +45,17 @@ struct metadata {
bit<32> psa_ingress_output_metadata_egress_port
bit<80> Ingress_tmp
bit<80> Ingress_tmp_0
bit<32> Ingress_tmp_1
bit<32> Ingress_tmp_2
bit<80> Ingress_tmp_3
bit<80> Ingress_tmp_4
bit<80> Ingress_tmp_5
bit<80> Ingress_tmp_1
bit<80> Ingress_tmp_2
bit<32> Ingress_tmp_4
bit<80> Ingress_tmp_6
bit<48> Ingress_tmp_7
bit<48> Ingress_tmp_8
bit<48> Ingress_tmp_9
bit<80> Ingress_tmp_7
bit<80> Ingress_tmp_8
bit<80> Ingress_tmp_9
bit<80> Ingress_tmp_10
bit<80> Ingress_tmp_11
bit<80> Ingress_tmp_12
bit<48> Ingress_tmp_13
bit<80> Ingress_tmp_15
bit<80> Ingress_tmp_16
bit<80> Ingress_s
}
metadata instanceof metadata
Expand All @@ -77,35 +76,38 @@ apply {
validate h.ipv4
mov h.ipv4.totalLen 0xe
jmpnv LABEL_END h.ipv4
regrd m.Ingress_tmp_12 port_pkt_ip_bytes_in_0 m.psa_ingress_input_metadata_ingress_port
mov m.Ingress_s m.Ingress_tmp_12
regrd m.Ingress_tmp_16 port_pkt_ip_bytes_in_0 m.psa_ingress_input_metadata_ingress_port
mov m.Ingress_s m.Ingress_tmp_16
mov m.Ingress_tmp m.Ingress_s
and m.Ingress_tmp 0xffffffffffff
mov m.Ingress_tmp_0 m.Ingress_tmp_12
mov m.Ingress_tmp_0 m.Ingress_tmp_16
shr m.Ingress_tmp_0 0x30
mov m.Ingress_tmp_1 m.Ingress_tmp_0
and m.Ingress_tmp_1 0xffffffff
mov m.Ingress_tmp_2 m.Ingress_tmp_1
add m.Ingress_tmp_2 0x1
mov m.Ingress_tmp_3 m.Ingress_tmp_2
mov m.Ingress_tmp_4 m.Ingress_tmp_3
shl m.Ingress_tmp_4 0x30
mov m.Ingress_tmp_5 m.Ingress_tmp_4
and m.Ingress_tmp_5 0xffffffff000000000000
and m.Ingress_tmp_2 0xffffffff
mov m.Ingress_tmp_4 m.Ingress_tmp_2
add m.Ingress_tmp_4 0x1
mov m.Ingress_tmp_6 m.Ingress_tmp_4
shl m.Ingress_tmp_6 0x30
mov m.Ingress_tmp_7 m.Ingress_tmp_6
and m.Ingress_tmp_7 0xffffffff000000000000
mov m.Ingress_s m.Ingress_tmp
or m.Ingress_s m.Ingress_tmp_5
mov m.Ingress_tmp_6 m.Ingress_s
and m.Ingress_tmp_6 0xffffffff000000000000
mov m.Ingress_tmp_7 m.Ingress_s
mov m.Ingress_tmp_8 h.ipv4.totalLen
mov m.Ingress_tmp_9 m.Ingress_tmp_7
add m.Ingress_tmp_9 m.Ingress_tmp_8
or m.Ingress_s m.Ingress_tmp_7
mov m.Ingress_tmp_8 m.Ingress_s
and m.Ingress_tmp_8 0xffffffff000000000000
mov m.Ingress_tmp_9 m.Ingress_s
and m.Ingress_tmp_9 0xffffffffffff
mov m.Ingress_tmp_10 m.Ingress_tmp_9
mov m.Ingress_tmp_11 m.Ingress_tmp_10
and m.Ingress_tmp_11 0xffffffffffff
mov m.Ingress_s m.Ingress_tmp_6
or m.Ingress_s m.Ingress_tmp_11
mov m.Ingress_tmp_12 m.Ingress_s
regwr port_pkt_ip_bytes_in_0 m.psa_ingress_input_metadata_ingress_port m.Ingress_tmp_12
and m.Ingress_tmp_10 0xffffffffffff
mov m.Ingress_tmp_13 m.Ingress_tmp_10
add m.Ingress_tmp_13 h.ipv4.totalLen
mov m.Ingress_tmp_15 m.Ingress_tmp_13
and m.Ingress_tmp_15 0xffffffffffff
mov m.Ingress_s m.Ingress_tmp_8
or m.Ingress_s m.Ingress_tmp_15
mov m.Ingress_tmp_16 m.Ingress_s
regwr port_pkt_ip_bytes_in_0 m.psa_ingress_input_metadata_ingress_port m.Ingress_tmp_16
LABEL_END : jmpneq LABEL_DROP m.psa_ingress_output_metadata_drop 0x0
emit h.ethernet
emit h.ipv4
Expand Down