Skip to content

Commit

Permalink
ARM: dts: rp1: Adjust audio PLL frequencies
Browse files Browse the repository at this point in the history
With the main audio PLL at 1.536GHz it is impossible to get I2S audio
at 384KHz with a frame length of 64 (32-bit stereo). Reducing it to
1.2288GHz makes it possible. This change is incompatible with a 192MHz
audio_sec PLL, so change this to 153.6MHz to make another set of
frequencies available.

See: raspberrypi#5743 (comment)

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  • Loading branch information
pelwell committed Feb 29, 2024
1 parent 99e1fb3 commit 70a4edf
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions arch/arm/boot/dts/broadcom/rp1.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -35,11 +35,11 @@
<&rp1_clocks RP1_CLK_ETH_TSU>;

assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
<1536000000>, // RP1_PLL_AUDIO_CORE
<1228800000>, // RP1_PLL_AUDIO_CORE
<200000000>, // RP1_PLL_SYS
<125000000>, // RP1_PLL_SYS_SEC
<61440000>, // RP1_PLL_AUDIO
<192000000>, // RP1_PLL_AUDIO_SEC
<122880000>, // RP1_PLL_AUDIO
<153600000>, // RP1_PLL_AUDIO_SEC
<200000000>, // RP1_CLK_SYS
<100000000>, // RP1_PLL_SYS_PRI_PH
// Must match the XOSC frequency
Expand Down

0 comments on commit 70a4edf

Please sign in to comment.