Name		Name	Last commit message	Last commit date
Latest commit History 30 Commits
.qsys_edit		.qsys_edit
assets		assets
cecko		cecko
greybox_tmp		greybox_tmp
nios_system/synthesis		nios_system/synthesis
output_files		output_files
simulation		simulation
software		software
workspace/.metadata		workspace/.metadata
.gitignore		.gitignore
@ListOfFiles.txt		@ListOfFiles.txt
@README.txt		@README.txt
Chain1.cdf		Chain1.cdf
DE115.sdc		DE115.sdc
DE2_115_lcd_pin_assignments.csv		DE2_115_lcd_pin_assignments.csv
DE2_115_pin_assignments.csv		DE2_115_pin_assignments.csv
DE2_pin_assignments.csv		DE2_pin_assignments.csv
Demo_LCD.bdf		Demo_LCD.bdf
DisplayLogicBig.bsf		DisplayLogicBig.bsf
DisplayLogicBig.vhd		DisplayLogicBig.vhd
DisplayLogicBigInvert.bsf		DisplayLogicBigInvert.bsf
DisplayLogicBigInvert.vhd		DisplayLogicBigInvert.vhd
DisplayLogicSmall.bsf		DisplayLogicSmall.bsf
DisplayLogicSmall.vhd		DisplayLogicSmall.vhd
FSM.bsf		FSM.bsf
FSM.vhd		FSM.vhd
LCDRegDE2_115.bsf		LCDRegDE2_115.bsf
LCDRegDE2_115.vhd		LCDRegDE2_115.vhd
LCD_altpll.ppf		LCD_altpll.ppf
LCD_altpll.qip		LCD_altpll.qip
LCD_altpll.vhd		LCD_altpll.vhd
LCDgenerator.bsf		LCDgenerator.bsf
LCDgenerator.vhd		LCDgenerator.vhd
LCDpackage.vhd		LCDpackage.vhd
LSP_Nios.bsf		LSP_Nios.bsf
LSP_Nios.vhd		LSP_Nios.vhd
OutputSwitch.bsf		OutputSwitch.bsf
README.md		README.md
TimerGenerator.vhd		TimerGenerator.vhd
VGA.dpf		VGA.dpf
VGA.out.sdc		VGA.out.sdc
VGA.qpf		VGA.qpf
VGA.qsf		VGA.qsf
VGA1.out.sdc		VGA1.out.sdc
VGARegDE2.bsf		VGARegDE2.bsf
VGARegDE2.vhd		VGARegDE2.vhd
VGARegDE2_115.bsf		VGARegDE2_115.bsf
VGARegDE2_115.vhd		VGARegDE2_115.vhd
VGAgenerator.bsf		VGAgenerator.bsf
VGAgenerator.vhd		VGAgenerator.vhd
VGAgenerator_Waveform.vwf		VGAgenerator_Waveform.vwf
VGApackage.vhd		VGApackage.vhd
VGAtiming.sdc		VGAtiming.sdc
Vetrnikov_128x128.mif		Vetrnikov_128x128.mif
Vetrnikov_256x256.mif		Vetrnikov_256x256.mif
VideoMixer.bsf		VideoMixer.bsf
VideoMixer.vhd		VideoMixer.vhd
lcd_display.sdc		lcd_display.sdc
nios_system.bsf		nios_system.bsf
nios_system.csv		nios_system.csv
nios_system.qsys		nios_system.qsys
nios_system.sopcinfo		nios_system.sopcinfo
nios_system.spd		nios_system.spd
outputSwitch.vhd		outputSwitch.vhd
romPicture128x128.qip		romPicture128x128.qip
romPicture128x128.vhd		romPicture128x128.vhd
romPicture256x256.qip		romPicture256x256.qip
romPicture256x256.vhd		romPicture256x256.vhd
sdram_pll.qip		sdram_pll.qip
sdram_pll.vhd		sdram_pll.vhd
testbench_DisplayLogic.vhd		testbench_DisplayLogic.vhd

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Video switch

Projekt tvoreny v ramci predmetu LSP. Cilem je vytvorit videoprepinac na vyukove desce DE2-115 s FPGA (EP4CE115F29C7) z rodiny Cyclone IV E.

1. etapa

prepinani obrazku 2 velikosti pomoci SW[0] a ACLRN na KEY[3]

2. etapa

FSM, ktery automaticky prepina mezi jednotlivy nalepkami pomoci efektu

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Video switch

1. etapa

2. etapa

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petrkucerak/video-switch

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Video switch

1. etapa

2. etapa

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